Vertical precharge structure for DRAM

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257303, 257304, H01L 27108, H01L 2976, H01L 2994, H01L 31119

Patent

active

056843135

ABSTRACT:
A DRAM one device cell and an associated precharge circuit are integrated together in a novel structure having an area of only four square features. The structure also provides physical and electrical separation between adjacent cells along a direction parallel to the DRAM word lines. The DRAM bit line length per bit is reduced by 50% relative to a conventional planar integrated structure disclosed elsewhere. As a result, bit line capacitance is also substantially reduced, and the effectiveness of a precharge technique for reduction of DRAM power consumption is enhanced by the dense novel structure.

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