Vertical MOSFET SRAM cell

Details Vertical MOSFET SRAM cell Vertical MOSFET SRAM cell

2006-11-21

2006-11-21

Schillinger, Laura M. (Department: 2813)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S379000, C327S051000, C327S055000

Reexamination Certificate

active

07138685

ABSTRACT:
A method of forming an SRAM cell device includes the following steps. Form pass gate FET transistors and form a pair of vertical pull-down FET transistors with a first common body and a first common source in a silicon layer patterned into parallel islands formed on a planar insulator. Etch down through upper diffusions between cross-coupled inverter FET transistors to form pull-down isolation spaces bisecting the upper strata of pull-up and pull-down drain regions of the pair of vertical pull-down FET transistors, with the isolation spaces reaching down to the common body strata. Form a pair of vertical pull-up FET transistors with a second common body and a second common drain. Then, connect the FET transistors to form an SRAM cell.

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patent: 2004/0113207 (2004-06-01), Hsu et al.

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