Vertical memory device structures

Details Vertical memory device structures Vertical memory device structures

2004-09-03

2008-05-27

Huynh, Andy (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S295000, C257S315000

Reexamination Certificate

active

07378702

ABSTRACT:
Vertically oriented semiconductor memory cells are added to a separately fabricated substrate that includes electrical devices and/or interconnect. The plurality of vertically oriented semiconductor memory cells are physically separated from each other, and are not disposed within the same semiconductor body. The plurality of vertically oriented semiconductor memory cells can be added to the separately fabricated substrate as a thin layer including several doped semiconductor regions which, subsequent to attachment, are etched to produce individual doped stack structures, which are then supplied with various dielectric coatings, gate electrodes, and contacts by means of further processing operations. Alternatively, the plurality of vertically oriented semiconductor memory cells may be completely fabricated prior to attachment. DRAMs, SRAMs, non-volatile memories, and combinations of memory types can be provided.

REFERENCES:
patent: 6943067 (2005-09-01), Greenlaw

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