Vertical memory device and method

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S068000, C257S288000, C257SE21660, C257SE21680, C257SE21661, C257SE21662

Reexamination Certificate

active

07663172

ABSTRACT:
Method and apparatus are described for a memory cell includes a substrate, a body extending vertically from the substrate, a first gate having a vertical member and a horizontal member and a second gate comprising a vertical member and a horizontal member. The first gate is disposed laterally from the body and the second gate is disposed laterally from the first gate.

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patent: 2006/105461 (2006-10-01), None

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