Vertical junction field effect transistors, and methods of...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S302000, C257SE29262

Reexamination Certificate

active

10522278

ABSTRACT:
A vertical JFET1aaccording to the present invention has an n+type drain semiconductor portion2, an n-type drift semiconductor portion3, a p+type gate semiconductor portion4, an n-type channel semiconductor portion5, an n+type source semiconductor portion7, and a p+type gate semiconductor portion8. The n-type drift semiconductor portion3is placed on a principal surface of the n+type drain semiconductor portion2and has first to fourth regions3ato3dextending in a direction intersecting with the principal surface. The p+type gate semiconductor portion4is placed on the first to third regions3ato3cof the n-type drift semiconductor portion3. The n-type channel semiconductor portion5is placed along the p+type gate semiconductor portion4and is electrically connected to the fourth region3dof the n-type drift semiconductor portion3.

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