Vertical interconnection structure and methods

Details Vertical interconnection structure and methods Vertical interconnection structure and methods

2005-05-17

2005-05-17

Lebentritt, Michael (Department: 2824)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S596000, C438S608000, C438S257000, C438S268000

Reexamination Certificate

active

06893951

ABSTRACT:
Interconnection structures for integrated circuits have first cells disposed in a first plane, at least second cells disposed in at least a second plane parallel to the first plane, and vertical interconnections disposed for connecting conductors in the first plane with conductors in the second plane, at least some of the vertical interconnections initially incorporating antifuses. The antifuses may be disposed over conductors that are disposed on a base substrate. The antifuses are selectively fused to prepare the integrated circuit for normal operation. Methods for fabricating and using such vertical interconnection structures are disclosed.

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