Vertical interconnect structure, memory device and...

Details Vertical interconnect structure, memory device and... Vertical interconnect structure, memory device and...

2011-08-16

2011-08-16

Such, Matthew W (Department: 2891)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C257S768000, C257SE21593

Reexamination Certificate

active

07998858

ABSTRACT:
The present invention relates to a method for producing a vertical interconnect structure, a memory device and an associated production method, in which case, after the formation of a contact region in a carrier substrate a catalyst is produced on the contact region and a free-standing electrically conductive nanoelement is subsequently formed between the catalyst and the contact region and embedded in a dielectric layer.

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