Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Patent
1995-04-28
1997-09-23
Loke, Steven H.
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
257339, 257342, H01L 2976, H01L 2994, H01L 31062
Patent
active
056708114
ABSTRACT:
The present invention is directed to a semiconductor device which can achieve high current density and which has a high reliability. In the insulated gate semiconductor device according to the present invention, a plurality of insulating gates are provided, with each two adjacent insulating gates being spaced from each other, the insulating gates being provided on a second semiconductor region of a first conductivity type. A first semiconductor region, of the same or different conductivity type from that of the second semiconductor region, extends from a surface of the second semiconductor region opposed to the surface thereof having the insulating gates thereon. A plurality of third semiconductor regions are provided in the second semiconductor region, between the insulating gates and aligned therewith, and two fourth semiconductor regions are provided extending into each of the third semiconductor regions, aligned with the sides of adjacent insulating gates. Electrodes are respectively provided in contact with the first semiconductor region and in contact with the third and fourth semiconductor regions, the electrode in contact with the third and fourth semiconductor regions contacting such regions in the space between adjacent insulating gates. By utilizing such aligned third and fourth semiconductor regions, an insulated gate semiconductor device which operates at high current densities can be fabricated at high accuracy, and such device will be less influenced by parasitic bipolar transistor effects.
REFERENCES:
patent: 4417385 (1983-11-01), Temple
patent: 4466176 (1984-08-01), Temple
patent: 4774198 (1988-09-01), Contiero et al.
patent: 5285094 (1994-02-01), Mori et al.
"New Self-Aligned Fabrication Process Using PSG Sidewall For Power Devices with DMOS Structure", Mori, et al, Proceedings of 1988 International Symposium on Power Semiconductor Devices, Tokyo, pp. 159-163, Aug. 22-23, 1988.
Mori Mutsuhiro
Nakano Yasunori
Tanaka Tomoyuki
Yasuda Yasumichi
Hitachi , Ltd.
Loke Steven H.
LandOfFree
Vertical insulated gate semiconductor device having high current does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Vertical insulated gate semiconductor device having high current, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Vertical insulated gate semiconductor device having high current will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1939578