Vertical double diffused MOSFET and method of fabricating...

Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – With pn junction isolation

Reexamination Certificate

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C257S288000

Reexamination Certificate

active

06867476

ABSTRACT:
In a DMOS device, a drift region is located over a substrate and is lightly doped with impurities of a first conductivity type. A plurality of body areas are located in the drift region and doped with impurities of a second conductivity type which is opposite the first conductivity type. A plurality of source areas are respectively located in the body areas and heavily doped with impurities of the first conductivity type. A plurality of bulk areas are respectively located adjacent the source areas and in the body areas, and are heavily doped with impurities of the second conductivity type. A well region partially surrounds the body areas collectively and is doped with impurities of the first conductivity.

REFERENCES:
patent: 5488236 (1996-01-01), Baliga et al.
patent: 5945709 (1999-08-01), Williams et al.
patent: 6239463 (2001-05-01), Williams et al.
patent: 6586801 (2003-07-01), Onishi et al.
patent: 1999-0066314 (1999-08-01), None
patent: 000000936 (2000-01-01), None

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