Electric lamp and discharge devices: systems – Cathode ray tube circuits – Cathode-ray deflections circuits
Patent
1991-06-03
1993-01-05
Blum, Theodore M.
Electric lamp and discharge devices: systems
Cathode ray tube circuits
Cathode-ray deflections circuits
315389, H01J 2970, H01J 2976
Patent
active
051774143
DESCRIPTION:
BRIEF SUMMARY
TECHNICAL FIELD
The present invention relates to a low-frequency power circuit and, more particularly, to a vertical deflection circuit of a television receiver.
BACKGROUND ART
FIG. 4 shows a conventional SEPP (Single Ended Push-Pull) type vertical deflection circuit comprising a single power source.
An input terminal 1 for receiving a saw-tooth wave signal is connected to the non-inverting input terminal of a power amplifier 2. The output terminal of the power amplifier 2 is connected to an output terminal 3 and at the same time is grounded through resistors R1 and R2. The node of the resistors R1 and R2 is connected to the inverting input terminal of the power amplifier 2. A series circuit of a vertical deflection coil L, capacitors C1 and C2, and a resistor R3 is connected between the output terminal 3 and the node of the resistors R1 and R2. The node of the capacitors C1 and C2 is grounded through a resistor R4.
The resistors R1 and R2 are negative feedback resistors for determining the DC operating point of the output signal of the power amplifier 2. The capacitors C1 and C2 are DC-blocking capacitors. Especially, in an SEPP type vertical deflection circuit comprising a single power source, the capacitor C1 operates as a power source during a negative half cycle. Therefore, an electrolytic capacitor having a large capacitance of about 1,000 .mu.F is used as the capacitor C1.
In the above arrangement, assuming that the DC voltage is Vref with no signal being input to the input terminal 1, the potential Vo at the output terminal 3 is:
On the other hand, during AC operation, i.e., when a saw-tooth wave signal is input to the input terminal 1, the capacitors C1 and C2 are conductive. Thus, an AC power amplification factor Gv is approximately:
During an AC operation, a feedback occurs from the node A of the capacitors C1 and C2, and accordingly, a negative feedback occurs such that a signal generated in the resistor R4 becomes Gv times an input signal. As a result, assuming that an input signal is Vin, a current
However, since the conventional vertical deflection circuit is an SEPP circuit having a single power source, the large-capacitance capacitor C1 is required for DC blocking. Furthermore, since an AC saw-tooth wave signal is supplied to the vertical deflection coil L, the resistors R1 to R3, the capacitor C2, and the like are also required to determine the AC and DC operating points.
Normally, the power amplifier 2 is packaged in an integrated circuit to increase the reliability and to lower the price. However, the capacitors C1 and C2, the resistors R1 to R4, and the like are components that are externally connected to the integrated circuit. When the number of components externally connected to an integrated circuit is large, the reliability is degraded and the cost increases.
DISCLOSURE OF INVENTION
It is an object of the present invention to provide a vertical deflection circuit in which the problems associated with a conventional vertical deflection circuit are solved and the number of components externally connected to an integrated circuit is decreased to increase the reliability and to suppress an increase in cost.
In order to solve the problems described above, the present invention provides a first negative feedback amplifier, having an input terminal to which a saw-tooth wave is supplied, and an output terminal connected to one terminal of a deflection coil, a second negative feedback amplifier, having an output terminal to which the other terminal of the deflection coil is connected through a resistor, the output terminal outputting a direct-current voltage which is set to be equal to that of the first negative feedback amplifier in a non-signal stage, and circuit means, provided between an input terminal of the second negative feedback amplifier and the input terminal of the first negative feedback amplifier, for operating the second negative feedback amplifier in a phase opposite to that of the first negative feedback amplifier.
More specifically, according to the present inventi
REFERENCES:
patent: 3991345 (1976-11-01), Jaspers
patent: 4161676 (1979-07-01), Alisic et al.
patent: 4719393 (1988-01-01), McCanney
Blum Theodore M.
Kabushiki Kaisha Toshiba
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