Vertical current flow field effect transistor with thick insulat

Details Vertical current flow field effect transistor with thick insulat Vertical current flow field effect transistor with thick insulat

1992-07-08

1994-03-29

Hille, Rolf

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257344, 257408, H01L 2976, H01L 2994, H01L 31062

Patent

active

052987817

ABSTRACT:
A transistor includes an N+ substrate, an N- region formed on the N+ substrate, a P- body region formed on the N- region, and an N+ source region formed on the P- body region. A vertical groove extends through the N+, P- and N- regions, and an insulating layer is formed on the groove walls. A polysilicon gate is formed inside the groove. Of importance, the portion of the insulating layer between the polysilicon and the N+ region and the insulating layer between the polysilicon and the N+ substrate is thicker than the portion of the insulating layer between the polysilicon gate and the P- body region. Because of the enhanced thickness of the portions of the insulating layer between the gate and N+ substrate, the transistor constructed in accordance with our invention is less susceptible to premature field induced breakdown.

REFERENCES:
patent: 4503449 (1985-03-01), David et al.
patent: 4814839 (1989-03-01), Nishizawa et al.
patent: 4941026 (1990-07-01), Temple

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