Semiconductor device manufacturing: process – Forming bipolar transistor by formation or alteration of... – Having heterojunction
Reexamination Certificate
2001-08-15
2004-04-20
Trinh, Michael (Department: 2822)
Semiconductor device manufacturing: process
Forming bipolar transistor by formation or alteration of...
Having heterojunction
C438S318000, C438S320000, C438S341000
Reexamination Certificate
active
06723610
ABSTRACT:
FIELD OF THE INVENTIONS
The invention relates to vertical bipolar transistors, in particular, those intended to be integrated in high-frequency technologies with very large scale integration (VLSI). Furthermore, the invention relates to the characteristics and the production of the epitaxial bases of these transistors.
BACKGROUND OF THE INVENTION
In the related patent application, filed by the applicant on the same day as the present patent application, and entitled “LOW-NOISE VERTICAL BIPOLAR TRANSISTOR AND CORRESPONDING FABRICATION PROCESS”, U.S. patent application Ser. No. 09/323,418, a method is described for producing a vertical bipolar transistor with a silicon/germanium heterojunction base and epitaxial emitter on the upper surface of this base. As described in this patent application, the production of the base includes nonselective epitaxy of a stack of layers of silicon and silicon-germanium in a window, referred to as the “base window”, made on the surface of the intrinsic collector, as well as on the two parts of an amorphous-silicon protective layer which are arranged on sides of the base window.
Before carrying out this nonselective epitaxy, chemical deoxidation of the base window is carried out, followed by a treatment under hydrogen at a temperature in excess of 600° C. for desorbing the residual components which may remain following the chemical deoxidation. However, during this desorption treatment the amorphous silicon converts into polysilicon, which leads to larger grains being obtained. This finally results in an increase in the roughness of the upper surface of the stack of epitaxial layers within which the base will be produced, which may be a problem in certain applications. This is because excessive roughness may pose problems in aligning the emitter window, as well as for the photolithography phases of the subsequent layers.
Furthermore, an excessive level difference between the peaks and troughs formed on the upper surface of the base may lead to implantation non-uniformities of the extrinsic base as well as to a silicide, deposited on the base, which is rougher and therefore more resistive. Consequently, this leads to an increase in the base-access resistance.
SUMMARY OF THE INVENTION
The object of the invention is, in particular, to reduce the roughness of the extrinsic base of these transistors, as well as the base-access resistance.
The invention therefore provides a method of producing an SiGe heterojunction base of a vertical bipolar transistor, comprising the formation, on a semiconductor block including an intrinsic collector region (for example, epitaxial or implanted) surrounded in its upper part by a side insulation region, of an initial layer of silicon nitride forming a window (base window) above the surface of the intrinsic collector. The production of the base then includes nonselective epitaxy of a stack of layers of silicon and silicon-germanium on that surface of the collector lying in the window and on the initial layer of silicon nitride.
In other words, the amorphous silicon layer is replaced by a silicon nitride layer and the epitaxy of the base begins directly on the nitride. This results in a significant reduction in the roughness of the upper surface of the base stack, and in certain cases resulting in the peak/trough level difference on the surface of the extrinsic base being reduced by half. Furthermore, whereas the amorphous silicon layer has been used to provide a uniform silicon substrate at the start of epitaxy so as to obtain better thickness uniformity in the deposition of the base, it has been observed that the silicon nitride layer also makes it possible to obtain good thickness uniformity of the base above the intrinsic collector and above the silicon nitride layer.
The invention also relates to a vertical bipolar transistor comprising a silicon-germanium heterojunction base formed in a stack of layers of silicon and silicon-germanium resting on an initial layer of silicon nitride extending over the side insulation region surrounding the upper part of the intrinsic collector, as well as on that surface of the intrinsic collector which lies inside a window formed in the initial layer of silicon nitride.
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Chantre Alain
Marty Michel
Regolini Jorge
Allen Dyer Doppelt Milbrath & Gilchrist, P.A.
Jorgenson Lisa K.
STMicroelectronics S.A.
Trinh Michael
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