Vertex processor with multiple interfaces

Details Vertex processor with multiple interfaces Vertex processor with multiple interfaces

2006-12-19

2006-12-19

Nguyen, Kimbinh T. (Department: 2628)

Computer graphics processing and selective visual display system

Computer graphics display memory system

Graphic display memory controller

C345S423000, C345S520000, C345S557000

Reexamination Certificate

active

07151543

ABSTRACT:
Method and interface for sending vertex data output from a vertex processing unit to memory is described. Conventionally, the vertex data output is not output directly to memory via a dedicated write interface, but is instead passed through downstream computation units in a graphics processor and written to memory via the write interface normally used to write pixel data. When the downstream computation units are configured to pass the vertex data output through unmodified, processing of the vertex data output by the downstream computation units is deferred until a second pass through those units. When the vertex data output is output directly to memory, processing of the vertex data output by the downstream computation units can be initiated during a first pass through those units.

REFERENCES:
patent: 6943797 (2005-09-01), Wasserman et al.
patent: 6975322 (2005-12-01), Lavelle
patent: 2003/0164823 (2003-09-01), Baldwin et al.

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