Versatile multiplexer-structures in programmable logic using...

Details Versatile multiplexer-structures in programmable logic using... Versatile multiplexer-structures in programmable logic using...

2008-09-23

2008-09-23

Le, Don P (Department: 2819)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C326S038000

Reexamination Certificate

active

12007705

ABSTRACT:
Logic design apparatus and method provides serial multiplexer chains in a programmable logic fabric, each element in the chain either selects output of block, or passes output from earlier element of the chain. Select line is a decoder structure or output from configurable function generator that is configured at power-on to create correct selection. Using such structure, larger multiplexer, including priority multiplexers, tristate buses or larger look-up tables (LUTs) can be created. These novel structures can implement priority, non-priority or tristate multiplexers.

REFERENCES:
patent: 2005/0117436 (2005-06-01), Cox
patent: 2005/0140389 (2005-06-01), Gliese et al.
patent: 2005/0162933 (2005-07-01), Madurawe
patent: 2006/0129747 (2006-06-01), Weber et al.

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