Verification circuits and methods for phase change memory array

Static information storage and retrieval – Systems using particular element – Amorphous

Reexamination Certificate

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C365S148000, C365S189070

Reexamination Certificate

active

07974122

ABSTRACT:
A verification circuit for a phase change memory array is provided. A sensing unit senses a sensing voltage from a memory cell of the phase change memory array according to an enable signal. A comparator generates a comparing signal according to the sensing voltage and a reference voltage, so as to indicate whether the memory cell is in a reset state. A control unit generates a control signal according to the enable signal. An operating unit generates a first signal according to the control signal, so as to indicate whether the comparator is active. An adjustment unit provides a writing current to the cell, and increases the writing current according to the control signal until the comparing signal indicates that the memory cell is in a reset state.

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patent: 2005/0068804 (2005-03-01), Choi et al.
patent: 2009/0296458 (2009-12-01), Lee et al.

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