Vector move instruction in a vector data processing system and m

Boots – shoes – and leggings

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395800, 395563, 364DIG1, G06F 1516

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056008112

ABSTRACT:
A "vnmvh" instruction reduces a substantial number of instructions and the temporary use of a register in a software code which executes nested conditional constructs in a vector data processor (10). When the vnmvh instruction is executed, all processing elements in the vector data processor participate in the function regardless of a setting of a status bit (Vt bit) (FIG. 6). During execution of the vnmvh instruction, the least significant bits of vector register specified in an operand are negated and moved into a plurality of history bits (Vh bits) (FIG. 6). The functionality provided by execution of vnmvh instruction allows a user to execute a nested conditional construct efficiently and effectively.

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