Various apparatuses and methods for reduced power states in...

Details Various apparatuses and methods for reduced power states in... Various apparatuses and methods for reduced power states in...

2005-06-30

2008-11-18

Perveen, Rehana (Department: 2116)

Electrical computers and digital processing systems: support

Computer power control

Power conservation

C713S300000, C713S320000, C713S323000

Reexamination Certificate

active

07454639

ABSTRACT:
A method, apparatus, and system are described in which a memory controller may have two or more registers to create and track zones of memory in a volatile memory device. The memory controller controls a power consumption state of a first zone of memory in the volatile memory device and a second zone of memory within the first volatile memory device on an individual basis; and one or more memory arrays contained within the first volatile memory device.

REFERENCES:
patent: 6708278 (2004-03-01), Howard et al.
patent: 6727952 (2004-04-01), Hirata et al.
patent: 6820169 (2004-11-01), Wilcox et al.
patent: 7003639 (2006-02-01), Tsern et al.
US SN, 11/173,784, Office action dated Oct. 4, 2007.
US SN, 11/173,784, Office action dated Apr. 10, 2008.

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