Variable temperature LOCOS process

Details Variable temperature LOCOS process Variable temperature LOCOS process

1998-09-02

2002-05-14

Smith, Matthew (Department: 2875)

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Recessed oxide by localized oxidation

C438S770000, C438S404000, 43, 43

Reexamination Certificate

active

06387777

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to semiconductor integrated device design and fabrication and, more particularly, to techniques for growing field oxide isolation layers in semiconductor substrates.
2. Description of the Related Art
In Metal-Oxide-Semiconductor (MOS) integration technology, the continuing trend in Ultra Large Scale Integration (ULSI) is driving the semiconductor industry to explore new materials and processes for fabricating integrated devices having sub-half-micron sized features.
This is of particular relevance to the manufacture of DRAM memory devices. Specifically, as the dimensions of individual memory cells in a DRAM array continue to shrink, the need for efficient and reliable isolation processes to separate active device regions dramatically increases. Consequently, radical modifications in conventional isolation technology are needed to isolate the devices of future scaled down integrated circuits.
Currently, LOCOS (for LOCal Oxidation of Silicon) process is widely used for device isolation applications in the semiconductor industry. In general, a thin layer of silicon oxide (SiO
2
) is initially grown over the wafer surface. This thin oxide layer is often referred to as pad oxide and functions for inhibiting the transition of stresses between the silicon substrate and the subsequently deposited nitride layer. Following this, a layer of silicon nitride is deposited on top of the pad oxide layer and lithographically defined to form an oxidation mask over the active device regions of the wafer. The nitride layer prevents the oxidation of active areas during the isolation oxide growth. The nitride layer is etched from the area between the active areas where an isolating SiO
2
layer, which is known as field oxide, is to be thermally grown over the wafer. In a LOCOS process, the oxidation is performed in an oxidation furnace at a temperature range between 800° C. and 1100° C. At this temperature range, wafers are exposed to oxidizing species, such as oxygen or water steam, to grow the field oxides.
Unfortunately, there are problems associated with growing these field oxide regions with the conventional LOCOS process. These problems basically originate from both the volumetric expansion and the kinetic of the oxidation reaction. During the oxidation reaction each unit volume of silicon produces two units of silicon oxide. This two-fold expansion causes a high level of stress build-up, especially at the silicon-silicon dioxide (Si/SiO
2
) interface under the edge of the nitride masking layer and in the substrate regions near this interface.
The kinetics of the oxidation reaction also intensifies this problem during the course of the oxidation process. During the course of oxidation, the silicon dioxide experiences both the linear and logarithmic growth rates. At the beginning of the oxidation, the oxidation rate is linear, i.e., the oxide layer grows uniformly with respect to increasing oxidation time. At this stage, the oxide layer is thin so that the oxidizing species easily diffuse to the silicon-silicon oxide interface through the thin but growing oxide layer, causing further growth at the interface. However, as the oxide layer becomes thicker, the diffusion of oxidizing species across this oxide layer becomes more difficult. Under these conditions, the oxidation shifts from a linear to a logarithmic rate, which results in a slower oxidation rate.
Stress-related problems are most severe during early linear growth in the LOCOS process. At this beginning stage, the stress caused by rapid volumetric expansion of the silicon oxide layer introduces many defects into the silicon substrate. These defects deteriorate the quality of device isolation, causing current leakage between neighboring devices, and resulting in device failures. Therefore, any technique aimed at reducing this unwanted stress in the substrate greatly increases final device reliability and quality.
One method of reducing stress-induced defects is by performing the oxidation at an elevated temperature, generally as high as 1100° C. Specifically, high temperature oxidation greatly reduces the viscosity of the growing oxide layer. In this less viscous state, the growing oxide layer flows easily from the Si/SiO
2
interface under the edge of the nitride masking layer, thereby effectively relieving the defect forming stresses at the neighboring substrate regions.
Although the process reduces the stress level in the substrate by flowing the oxide layer from under the edge of the nitride masking layer, high temperature oxidation has significant drawbacks. For example, while decreasing viscosity in the field oxide, high temperature oxidation even further increases the rate of oxidation during linear growth. At this high temperature, the oxide growth rate can be so high that the oxide layer may grow faster than it flows. As a result, the growing oxide layer still exerts stress on the substrate and cause defects.
Another drawback is active area loss induced by the lateral encroachment of the growing field oxide, which is often referred to as “bird's beak” encroachment. In fact, the bird's beak problem is one of the most serious problems encountered in the conventional LOCOS process, greatly reducing the efficiency of conventional LOCOS processes. The bird's beak encroachment causes the field oxide layer to grow under and lift the edges of the nitride masking stack during field oxide growth. Therefore, bird's beak encroachment reduces the size of the usable active areas on the substrate by transforming them into silicon oxide.
SUMMARY OF THE INVENTION
Accordingly, there is a need in current semiconductor technology for improved methods of forming isolation regions without losing active areas. Additionally, a need exists to minimize the stress during the oxidation processes.
The aforementioned needs are satisfied by the process of the present invention, which provides field oxide in isolation regions without exerting significant stress in the substrate under the edge of the nitride masking layer. In the illustrated embodiment, a wet oxidation process can begin at temperatures below conventional oxidation temperatures, while the substrate temperature is being ramped up towards a higher temperature.
Specifically, the lower starting temperature in the illustrated embodiment provides a lower oxidation rate during the ramp, and thus retards the initial growth and resulting volumetric expansion. This, in turn, provides sufficient time to grow enough oxide such that the oxidation rate is in the logarithmic regime at each temperature during the ramp up. Therefore, at this lower temperature, a relative equilibrium is established wherein the oxidation rate remains less than or equal to the oxide flow rate. Desirably, such a relative equilibrium is maintained throughout the oxidation process.
In one aspect of the present invention, therefore, a process of forming an isolation region in a semiconductor substrate includes providing the substrate with a defined isolation region. The substrate is positioned in a reaction chamber and the substrate is heated from a from a first temperature to a second temperature. While the substrate is being heated, the isolation region is exposed to an oxidizing ambient. Accordingly, an oxide is grown in the isolation region while heating the substrate.
Since the plateau or steady temperature has not yet been reached, this oxide growth is slower than initial oxide growths in conventional chambers, even if a wet oxidation is used. Moreover, in the illustrated embodiment, wet oxidation during temperature ramping is preceded by an initial dry oxidation, further slowing the starting wet oxidation since the wet oxidants must diffuse through the intitial oxide.


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patent: 4109030 (1978-08-01), Briska et al.
patent: 4179792 (1979-12-01), Marshall et al.
patent: 4551910 (1985-11-01), Patterson
patent: 4630356 (1986

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