Static information storage and retrieval – Read/write circuit – Differential sensing
Reexamination Certificate
2007-10-30
2010-06-22
Nguyen, Van Thu (Department: 2824)
Static information storage and retrieval
Read/write circuit
Differential sensing
C365S103000, C365S207000, C365S208000, C365S210110
Reexamination Certificate
active
07742352
ABSTRACT:
Techniques for use with a fuse-based non-volatile memory circuit include digitally controlling a resistance threshold of the circuit. The circuit includes a fuse circuit and a comparator circuit. The comparator circuit is configured to compare a first signal indicative of the fuse resistance to a second signal indicative of a reference level. At least one of the first and second signals is digitally controllable. The comparator circuit is configured to generate a digital output signal indicative of the comparison. The circuit may include a first digital-to-analog converter circuit configured to generate a first analog signal based on at least a first plurality of digital signals. The first signal is at least partially based on the first analog signal. The circuit may include a control circuit configured to digitally control the digitally controllable ones of the first and second signals at least partially based on the digital output signal.
REFERENCES:
patent: 4730273 (1988-03-01), Sluss
patent: 5731733 (1998-03-01), Denham
patent: 5789970 (1998-08-01), Denham
patent: 5959445 (1999-09-01), Denham
patent: 6121820 (2000-09-01), Shishikura
patent: 6208549 (2001-03-01), Rao et al.
patent: 6370060 (2002-04-01), Takata et al.
patent: 6384664 (2002-05-01), Hellums et al.
patent: 6417720 (2002-07-01), Denham
patent: 6670843 (2003-12-01), Moench et al.
patent: 6903986 (2005-06-01), Hejdeman et al.
patent: 6906557 (2005-06-01), Parker et al.
patent: 7030641 (2006-04-01), Tang et al.
patent: 7098721 (2006-08-01), Ouellette et al.
patent: 7145346 (2006-12-01), Chung et al.
patent: 7183836 (2007-02-01), Parker et al.
patent: 7208994 (2007-04-01), Parker et al.
patent: 7215175 (2007-05-01), Mandal et al.
patent: 7221210 (2007-05-01), Parker et al.
patent: 7535783 (2009-05-01), DeBrosse et al.
Alavi, Mohsen, et al., “A Prom Element Based on Salicide Agglomeration of Poly Fuses in a CMOS Logic Process,” International Electron Devices Meeting (IEDM 97), 1997, pp. 855-858.
Batchelor Jeffrey S.
Hara Susumu
Sonntag Jeffrey L.
Nguyen Van Thu
Silicon Laboratories Inc.
Zagorin O'Brien Graham LLP
LandOfFree
Variable sense level for fuse-based non-volatile memory does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Variable sense level for fuse-based non-volatile memory, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Variable sense level for fuse-based non-volatile memory will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4237115