Variable scaling of 16-bit fixed point fast fourier forward and

Details Variable scaling of 16-bit fixed point fast fourier forward and Variable scaling of 16-bit fixed point fast fourier forward and

1996-10-31

2000-10-24

Ghebretinsae, Temesghen

Pulse or digital communications

Systems using alternating or pulsating current

Plural channels for transmission of a single pulse train

345222, 370210, H04K 110

Patent

active

061378399

ABSTRACT:
A discrete multitone (DMT) digital subscriber loop (xDSL) telecommunication system has a transmitter portion including a bit encoder, inverse fast Fourier transform (FFT), parallel-to-serial converter, digital-to-analog converter and line driver for transmitting data signals to a twisted pair telephone line and a receiver portion including an analog-to-digital converter, serial-to-parallel converter, forward FFT and bit decoder for receiving data signals from the twisted pair telephone line. The FFT's are implemented in 19-bit precision using a fixed point 16-bit processor. At each FFT stage, the number of sign bits in the FFT input data is examined to determine whether overflow is possible during multiply and add operations. The input data is downscaled by right shifting one or two bits if overflow is possible. If downscaling occurred, the output data is rescaled after completion of the FFT operation. If overflow is not possible, no scaling is done. By using variable scaling to downscale only when necessary, better overall precision is maintained.

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