Variable delay circuit for varying delay time and pulse width

Details Variable delay circuit for varying delay time and pulse width Variable delay circuit for varying delay time and pulse width

1997-08-15

1999-09-07

Callahan, Tim

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Having specific delay in producing output waveform

327281, 327288, H03K 513, H03K 17687

Patent

active

059492686

ABSTRACT:
A variable delay circuit for controlling delay time includes P channel transistors connected in parallel, with respective source electrodes connected to a power supply, respective drain electrodes connected to an output terminal for providing delayed signal, and respective gate electrodes connected to respective control signal input terminals for receiving control signals. The circuit further includes N channel transistors with respective source electrodes connected to ground, respective drain electrodes connected to the output terminal, and respective gate electrode connected to the respective control signal input terminals. Identical or mutually inverted data signals or control signals are supplied to the respective gate electrodes of the P channel transistors and the respective gate electrodes of the N channel transistors.

REFERENCES:
patent: 5111085 (1992-05-01), Stewart
patent: 5128567 (1992-07-01), Tanaka et al.
patent: 5327031 (1994-07-01), Marbot et al.
patent: 5440260 (1995-08-01), Hayashi et al.
patent: 5491673 (1996-02-01), Okayasu

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