Variable data width operation in multi-gigabit transceivers...

Details Variable data width operation in multi-gigabit transceivers... Variable data width operation in multi-gigabit transceivers...

2005-11-01

2005-11-01

Le, Don (Department: 2819)

Electronic digital logic circuitry

Multifunctional or programmable

Having details of setting or programming of interconnections...

C326S041000

Reexamination Certificate

active

06960933

ABSTRACT:
A transmit variable-width interface can be programmed to convert an electronic digital data path that is either 1N, 2N, 4N, or 8N bits wide into a data path that is 2N bits wide, either by serializing bits (4N- or 8N-bit cases), re-clocking bits (2N-bit case), or grouping bits (1N-bit case). A receive variable-width interface can be programmed to convert a data path 2N bits wide into a data path that is 1N, 2N, 4N, or 8N bits wide. The widths of the two variable-width data paths are controlled independently. The variable-width interfaces are coupled between a multi-gigabit transceiver and core logic of a programmable logic device. The incoming and outgoing data paths of the variable-width interfaces have separate clocks signals that are synchronized such that small amounts of skew in these clock signals do not disrupt the operation of the variable-width interfaces.

REFERENCES:
patent: 5361373 (1994-11-01), Gilson
patent: 5537601 (1996-07-01), Kimura et al.
patent: 5652904 (1997-07-01), Trimberger
patent: 5671355 (1997-09-01), Collins
patent: 5752035 (1998-05-01), Trimberger
patent: 5970254 (1999-10-01), Cooke et al.
patent: 6020755 (2000-02-01), Andrews et al.
patent: 6096091 (2000-08-01), Hartmann
patent: 6279045 (2001-08-01), Muthujumaraswathy et al.
patent: 6282627 (2001-08-01), Wong et al.
patent: 6343207 (2002-01-01), Hessel et al.
Cary D. Snyder and Max Baron; “Xilinx's A-to-Z System Platform”; Cahners Microprocessor; The Insider's Guide to Microprocessor Hardware; Microdesign Resources; Feb. 6, 2001; pp. 1-5.
Xilinx, Inc.; “Virtex-II Platform FPGA Handbook”; published Dec. 2000, available from Xilinx, Inc,, 2100 Logic Drive, San Jose, California 95124; pp. 33-75.

Affiliated with

Also associated with

Rating

Variable data width operation in multi-gigabit transceivers... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Variable data width operation in multi-gigabit transceivers..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Variable data width operation in multi-gigabit transceivers... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3501570