Variable clocking in an embedded symmetric multiprocessor...

Details Variable clocking in an embedded symmetric multiprocessor... Variable clocking in an embedded symmetric multiprocessor...

2005-12-20

2005-12-20

Lee, Thomas (Department: 2115)

Electrical computers and digital processing systems: support

Computer power control

Power conservation

C713S300000, C713S375000, C713S401000

Reexamination Certificate

active

06978389

ABSTRACT:
In multiprocessor systems the task of holding power dissipation to its lowest possible level is challenging. This invention permits reduced power dissipation by optionally independently clocking selected central processing units at lower frequencies if they are not fully loaded. The variable clocking system enables synchronization between central processing units operating a differing frequencies and shared memory and peripherals. This allows for significant power reduction in the frequently occurring scenario where all processors are not driven to their limits by prevailing system requirements.

REFERENCES:
patent: 5812860 (1998-09-01), Horden et al.
patent: 6141762 (2000-10-01), Nicol et al.
patent: 6578123 (2003-06-01), Austin et al.
patent: 6664775 (2003-12-01), Clark et al.
patent: 6675304 (2004-01-01), Pole et al.

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