Variable clock delay circuit utilizing the R-C time constant

Details Variable clock delay circuit utilizing the R-C time constant Variable clock delay circuit utilizing the R-C time constant

1988-03-17

1990-01-30

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307603, 307605, 307482, 307481, 307578, 365203, H03K 513, H03K 1728, H03K 19096

Patent

active

048975591

ABSTRACT:
A variable clock delay circuit utilizing the RC time constant in a semiconductor memory has the improved delay effect of the RC time constant. The variable clock delay circuit in which, in the delay occurring between the clocks having the large width of variation according to the variation of the power source voltage, the RC time constant node is separated and precharged so that the delay of the charging time can be prevented, and the residual delay can be removed by using the precharging system utilizing the boosted clock.

REFERENCES:
patent: 3349255 (1965-04-01), McAvoy
patent: 3590280 (1971-06-01), Hudson et al.
patent: 3898479 (1975-08-01), Proebsting
patent: 4061933 (1977-12-01), Schroeder et al.
patent: 4554464 (1985-11-01), Davies et al.
patent: 4611136 (1986-09-01), Fujie
patent: 4723299 (1988-02-01), Kobayashi
patent: 4751407 (1988-06-01), Powell
patent: 4760281 (1988-07-01), Takemae
patent: 4788462 (1988-11-01), Vesce et al.

Affiliated with

Also associated with

Rating

Variable clock delay circuit utilizing the R-C time constant does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Variable clock delay circuit utilizing the R-C time constant, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Variable clock delay circuit utilizing the R-C time constant will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1924975