Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2002-03-05
2004-12-28
Thomas, Tom (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S313000, C257S532000, C257S595000, C257S599000, C257S600000, C257S602000
Reexamination Certificate
active
06835977
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of Invention
The present invention relates to a variable capacitor (varactor) structure and its method of manufacture. More particularly, the present invention relates to a high-frequency variable capacitor structure and its method of manufacture.
2. Description of Related Art
In this fast-changing society, wireless communication techniques are progressing at an unbelievably rapid pace and hence play an important role in data communication networks. Wireless communication is mostly conducted at very high frequency. Amongst the components used in high-frequency communication, variable capacitor (varactor for short) occupies a center stage.
In general, to change the capacitance of a variable capacitor, supply voltage to the variable capacitor is varied. When the capacitance of the varactor is changed, transmission or reception frequency of a high-frequency circuit is increased or decreased accordingly. Ultimately, wireless communication equipment containing this piece of high-frequency circuit is able to receive or transmit communication signals more accurately.
In the fabrication of high-frequency circuits, the metal-oxide semiconductor (MOS) devices and bipolar complementary metal-oxide-semiconductor (BiCMOS) devices are formed before the variable capacitor.
FIG. 6
is a schematic cross-sectional view of a conventional variable capacitor. In the conventional method of fabricating a variable capacitor, a substrate
10
having N
+
buried layer
12
on top, an N-well
14
above the buried layer
12
, a deep collector region
20
also above the buried layer
12
and a field oxide layer
16
above the substrate
10
is provided. P-type ions are next implanted into the N-well
14
to form a P
+
-doped region
18
near the surface of the N-well
14
. Thereafter, metal silicide layers
22
and
24
are formed over the P
+
-doped region
18
and the deep collector region
20
respectively. A dielectric layer
26
is formed over the substrate
10
. Contacts
28
and
30
are formed in the dielectric layer
26
in contact with the metal silicide layers
22
and
24
respectively. Up to this stage, a variable capacitor structure comprising of the deep collector
20
, the N
+
buried layer
12
and the N-well
14
/P
+
-doped region
18
is established.
Since the quality factor (Q) of the variable capacitor is inversely proportional to its resistance and capacitance and the capacitance value is the required capacitance of this variable capacitor, the quality factor of the variable capacitor can be improved only by lowering the resistance of the variable capacitor. However, in a conventional variable capacitor structure, the resistance of the variable capacitor is largely affected by the high resistance of the N-well
14
. Since resistance at the N-well
14
is difficult to reduce, further improvement in the operating efficiency of a variable capacitor is hard to come by.
SUMMARY OF THE INVENTION
Accordingly, one object of the present invention is to provide a variable capacitor or varactor having a considerably smaller resistance.
A second object of the invention is to provide a variable capacitor or varactor whose circuit layer requires a smaller space.
To achieve these and other advantages and in accordance with the purpose of the invention, as embodied and broadly described herein, the invention provides a variable capacitor structure. The variable capacitor includes a substrate, a first type ion-doped buried layer, a first type ion-doped well, a second type ion-doped region and a conductive layer. The first type ion-doped well is buried within the substrate. The first type ion-doped well also has a cavity section. The first type ion-doped buried layer is formed underneath and in direct contact with the first type well. The second type ion-doped region is formed within the cavity section of the first type ion-doped well. The conductive layer is formed above and in contact with the first type ion-doped buried layer.
This invention also provides an alternative variable capacitor structure. The variable capacitor includes a substrate, a first type ion-doped buried layer, a first type ion-doped well, at least one second type ion-doped region and at least one conductive layer. The substrate has at least a shallow trench isolation (STI) structure. The first type ion-doped well is buried within the substrate. The first type ion-doped buried layer is formed underneath the first type ion-doped well within the substrate. The first type ion-doped buried layer is in direct contact with the first type ion-doped well. The second type ion-doped region is formed underneath the shallow trench isolation structure within the first type ion-doped well. The conductive layer connects with the first type ion-doped buried layer.
This invention also provides a method of forming a variable capacitor. A substrate having a first type ion-doped buried layer and a first type ion-doped well region above and in contact with the first type ion-doped buried layer is provided. A portion of the first type ion-doped well is removed to form at least one opening without exposing the first type ion-doped buried layer. A second type ion-doped region is formed in the first type ion-doped well at the bottom of the opening.
This invention also provides an alternative method of forming a variable capacitor. A substrate having a first type ion-doped buried layer and a first type ion-doped well region above and in contact with the first type ion-doped buried layer is provided. A shallow trench isolation structure is formed within the first type ion-doped well. A portion of the first type ion-doped well is removed to form an opening that exposes a portion of the first type ion-doped buried layer. A dielectric layer is formed over the substrate. Thereafter, at least one first contact opening and at least one second contact opening are formed in the dielectric layer. The first contact opening exposes a portion of the metal silicide layer and the second contact opening exposes the first type ion-doped well at the bottom section of the shallow trench isolation structure. A second type ion-doped region is formed in the first type ion-doped region at the bottom section of the shallow trench isolation structure. Contacts are formed inside the first contact opening and the second contact opening. The second type ion-doped region may also be formed within the step of forming the shallow trench isolation structure.
In this invention, resistance of the variable capacitor is reduced by shortening the overall width of the second type ion-doped well from the second type ion-doped region to the first type ion-doped buried layer.
In the manufacturing step for producing the variable capacitor, a portion of the process is carried out in tandem with the process for fabricating the bipolar devices. Hence, resistance of the variable capacitor is reduced without increasing mask requirements.
Unlike a conventional variable capacitor that requires a deep collector, contacts are directly used to make contact with the buried layer so that resistance of the variable capacitor is further reduced.
Furthermore, the doped region is formed at the bottom section of the shallow trench isolation structure to reduce overall volume occupation of the circuit layout.
It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed.
REFERENCES:
patent: 5936164 (1999-08-01), Sparks et al.
patent: 6583495 (2003-06-01), Lee et al.
patent: 03147375 (1991-06-01), None
Chen Anchor
Gan Jing-Horng
J.C. Patents
United Microelectronics Corp.
Warren Matthew E.
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