Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
Patent
1996-07-17
1998-06-02
Swann, Tod R.
Electrical computers and digital processing systems: memory
Storage accessing and control
Shared memory area
39520044, 711156, G06F 1200, G06F 15167
Patent
active
057617295
ABSTRACT:
In a computer system a plurality of workstations are connected to each other by a network. Each workstation including a processor, a memory having addresses, and an input/output interface connected to each other by a bus. The input/output interfaces connect the workstations to each other via the network. Valid data accesses are checked by a software implemented method. A set of the addresses of the memories are designated as virtual shared addresses to store shared data. A particular one of the programs allocates a portion of the virtual shared addresses to store a shared data structure as one or more blocks accessible by the programs executing in any of the processors. The size of a particular block depends on the size of the shared data structure. Each block including an integer number of lines, each line including a predetermined number of bytes. The program is instrumented to initialize the bytes allocated for the shared data structure to a predetermined flag value. The flag value indicates that the data are in an invalid state. Load instructions of the programs are instrumented to check if data loaded from the shared data structure are different than the predetermined flag value. The load instructions are executed if the data are different than the predetermined flag value. Otherwise, miss handling code is executed before the load instructions are executed.
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Brinkman Dirk
Digital Equipment Corporation
King , Jr. Conley B.
Stadnicki Alfred A.
Swann Tod R.
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