Electrical computers and digital data processing systems: input/ – Input/output data processing – Data transfer specifying
Reexamination Certificate
2005-06-07
2005-06-07
Huynh, Kim (Department: 2182)
Electrical computers and digital data processing systems: input/
Input/output data processing
Data transfer specifying
C710S021000, C710S022000, C710S039000, C710S040000, C710S316000
Reexamination Certificate
active
06904474
ABSTRACT:
A data transfer technique between a source port and a destination port of a transfer controller with plural ports. In response to a data transfer request (401), the transfer controller queries the destination port to determine if it can receive data of a predetermined size (402). If the destination port is not capable of receiving data, the transfer controller waits until said destination port is capable of receiving data (412). If the destination port is capable of receiving data, the destination port allocates a write reservation station to the data (403). Then the transfer controller reads data of the predetermined size from the source port (404) and transfers this read data to the destination port (405). The destination port forwards this data to an attached application unit, which may be memory or a peripheral, and then disallocates the write reservation station freeing space for further data transfer (406). This write driven process permits the transfer controller hub to service other data transfers from a fast source without being blocked by a slow destination.
REFERENCES:
patent: 5138611 (1992-08-01), Carn et al.
patent: 5333276 (1994-07-01), Solari
patent: 5581790 (1996-12-01), Sefidvash
patent: 5619544 (1997-04-01), Lewis et al.
patent: 5629950 (1997-05-01), Godiwala et al.
patent: 5630077 (1997-05-01), Krein et al.
patent: 5687390 (1997-11-01), McMillan, Jr.
patent: 5850571 (1998-12-01), Odom et al.
patent: 5894481 (1999-04-01), Book
patent: 5909594 (1999-06-01), Ross et al.
patent: 5924112 (1999-07-01), Barber et al.
patent: 6032205 (2000-02-01), Ogimoto et al.
patent: 6098109 (2000-08-01), Kotzur et al.
patent: 6493347 (2002-12-01), Sindhu et al.
patent: 6606326 (2003-08-01), Herring
patent: 6629166 (2003-09-01), Grun
patent: 9806474.4 (1998-03-01), None
patent: 2 325 824 (1998-12-01), None
Brady III W. James
Huynh Kim
Marshall, Jr. Robert D.
Sorrell Eron
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