Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2007-07-24
2007-07-24
Chiang, Jack (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000
Reexamination Certificate
active
10898707
ABSTRACT:
A method and computer program for verifying a design of a circuit comprises selecting a portion of a model of the design having a plurality of inputs and outputs; providing a property for the design that defines a predetermined behavior of one or more of the outputs; determining whether a stimulus exists that, when applied to the inputs of the portion, can produce a behavior other than the predetermined behavior at the outputs of the portion; when the stimulus exists, determining whether the model of the design of the circuit can produce the stimulus at the inputs of the portion of the model of the circuit; and when the stimulus cannot be produced by the model of the design of the circuit at the inputs of the portion of the model of the circuit, preserving a description of the stimulus for analysis.
REFERENCES:
patent: 6665848 (2003-12-01), Ben-David et al.
patent: 6715107 (2004-03-01), Beer et al.
patent: 6728939 (2004-04-01), Johannsen
patent: 6738955 (2004-05-01), Andersen et al.
patent: 6957404 (2005-10-01), Geist et al.
Bowers Brandon
Chiang Jack
Marvell Semiconductor Israel Ltd.
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