Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
Reexamination Certificate
2006-10-10
2006-10-10
Perveen, Rehana (Department: 2112)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus interface architecture
Reexamination Certificate
active
07120722
ABSTRACT:
In some embodiments, the inventions include a device and bus transaction control circuitry to receive bus transactions with tag space including a first part that at times is used to represent a transaction number and a second part that at times contains information which under some conditions is used by the device. Other embodiments are described and claimed.
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Design-for-validation involving deferred Identifier and system address controller described in the Information Disclosure Statement.
Das Sharma Debendra
Muthrasanallur Sridhar
Smith Michael D.
Intel Corporation
Pedigo Philip A.
Perveen Rehana
Vu Trisha
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