Static information storage and retrieval – Systems using particular element – Magnetoresistive
Reexamination Certificate
2002-06-20
2003-01-14
Tran, Andrew Q. (Department: 2824)
Static information storage and retrieval
Systems using particular element
Magnetoresistive
C365S173000, C365S171000, C365S051000, C365S194000, C365S191000
Reexamination Certificate
active
06507513
ABSTRACT:
TECHNICAL FIELD
The present invention relates to magneto-resistive devices. More specifically, the present invention relates to the timing of electrical pulses used with magneto-resistive elements.
BACKGROUND
Magneto-resistive devices include tunneling magneto-resistive (TMR) devices and giant magneto-resistive (GMR) devices. As these types of devices are known in the art, only a general description is provided herein.
A typical TMR device includes a pinned layer (or reference layer), a sense layer (or data layer, pre-layer, or bit layer), and an insulating tunnel barrier sandwiched between the pinned and sense layers. The pinned layer has a magnetization orientation that is fixed so as not to rotate in the presence of an applied magnetic field in a range of interest. The sense layer has a magnetization that can be oriented in either of two directions: the same direction as the pinned layer magnetization, or the opposite direction of the pinned layer magnetization. If the magnetization of the pinned layer and the magnetization of the sense layer are in the same direction, the orientation of the TMR device is said to be “parallel.” If the magnetization of the pinned layer and the magnetization of the sense layer are in opposite directions, the orientation of the TMR device is said to be “anti-parallel.”
A GMR device has the same basic configuration as a TMR device, except that the data (sense) and reference (pinned) layers are separated by a conductive non-magnetic metallic layer instead of an insulating tunnel barrier. Similar to a TMR device, the data and reference layers of a GMR device can have either parallel or anti-parallel orientations.
These two stable orientations, parallel and anti-parallel, may correspond to logic values of zero (0) and one (1). As such, the magneto-resistive devices are suited for use in memory devices commonly referred to s magnetic random access memory (MRAM) devices. MRAM is a non-volatile memory that is being considered for short-term and long-term data storage. MRAM has lower power consumption than short-term memory such as DRAM (dynamic RAM), SRAM (static RAM) and Flash memory. MRAM can perform read and write operations much faster (by orders of magnitude) than conventional long-term storage devices such as hard drives. In addition, MRAM is more compact and consumes less power than hard drives. MRAM is also being considered for embedded applications such as extremely fast processors and network appliances.
A typical MRAM device includes an array of magneto-resistive elements used as memory cells. The rows of the MRAM device are typically referred to as word lines, while the columns of the MRAM device are typically referred to as bit lines (rows and columns being relative terms). Each memory cell is located at a cross point of a word line and a bit line.
The data layer of a memory cell is read as either a 0 or a 1, depending on the orientation of its magnetization relative to the reference layer. Associated with a magnetized layer such as the data layer is a characteristic referred to as coercivity. Coercivity can be thought of as the amount of force associated with maintaining the magnetization orientation of the data layer. In other words, to flip (switch) the data layer from one logic value to another (from 0 to 1 or vice versa), an external magnetic field greater than the coercivity of the data layer needs to be applied. To switch a selected memory cell, electrical currents are applied to the bit line and the word line corresponding to the selected memory cell. In the memory cell at the intersection of the bit line and the word line, the magnetic field generated by the electrical currents will be enough to exceed the coercivity threshold, causing the bit to flip (that is, the data layer of the memory cell will change orientation).
The design of MRAM devices involves, among other things, striking a proper balance between coercivity and the current applied to the bit and word lines. If coercivity is too low, memory cells may be unstable, switching logic values when the coercivity threshold is inadvertently exceeded due to thermal fluctuations, for example. Increasing the coercivity means increasing the currents applied to the bit and word lines. However, the maximum current that can be driven through the lines is limited by the maximum current density of the lines. Also, increasing the current is undesirable from a power consumption point of view. Moreover, increasing the current may require larger write current driver transistors and thus may increase overhead, which may affect memory density.
In summary, it is desirable to increase the maximum switching field (the external magnetic field) that can be applied to magneto-resistive devices, without increasing the currents applied to the bit and word lines. Increasing the maximum switching field would allow the coercivity of the magneto-resistive devices to be increased. Increasing the coercivity, in turn, would increase the integrity of data written to memory cells and would reduce the undesirable side effect of inadvertent bit flipping. However, the prior art is problematic because an increase in coercivity is accompanied by an increase in current or a reduction in the density of the magneto-resistive devices.
SUMMARY
Embodiments of a device having a magneto-resistive element, a first conductor proximate to the magneto-resistive element, and a second conductor proximate to the magneto-resistive element are described. The magneto-resistive element is exposed to a magnetic field generated by a first electrical pulse carried by the first conductor. The magneto-resistive element is also exposed to a magnetic field generated by a second electrical pulse carried by the second conductor. The second electrical pulse is delayed relative to the first electrical pulse.
REFERENCES:
patent: 4554464 (1985-11-01), Davies et al.
Bhattacharyya Manoj
Sharma Manish
Tran Lung The
Hewlett--Packard Company
Tran Andrew Q.
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