Using a single buffer for multiple I/O standards

Details Using a single buffer for multiple I/O standards Using a single buffer for multiple I/O standards

2008-11-12

2010-12-21

Tran, Anh Q (Department: 2819)

Electronic digital logic circuitry

Interface

Current driving

C326S082000, C326S037000, C326S090000

Reexamination Certificate

active

07855577

ABSTRACT:
A buffer circuit for using one buffer for multiple differential I/O standards is disclosed. The buffer circuit includes a differential input buffer. The first input of the differential input buffer may receive an input and the second input is coupled to a switch. The switch may be a one-time-programmable switch. The switch has a coupling to transmit a signal to the second input of the differential input buffer. The switch may be programmed to selectively transmit different signals to the differential input buffer. The first input terminal of the switch may receive an inverted version of the input signal and the second input terminal of the switch may receive a reference voltage. The buffer may transmit an LVDS signal or an SSTL signal or an HSTL signal. Using one differential buffer for multiple I/O standards may reduce the overall die size and may save space on the die.

REFERENCES:
patent: 6218858 (2001-04-01), Menon et al.
patent: 6243776 (2001-06-01), Lattimore et al.
Rhyne, Fundamentals of Digital Systems Design, N.J., 1973, pp. 70-71.

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