Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2006-09-19
2006-09-19
Chiang, Jack (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
Reexamination Certificate
active
07111257
ABSTRACT:
A method of using special designed wiring level mask(s) to determine product transistor and circuit performance in a chip during the early portion of the product evaluation cycle saves weeks of time that would have been taken by the passage of the wafer through the fab. The method also saves cost during production by identifying wafers for rework at an early stage.
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Robson Norman W.
Wu Teresa J.
Chiang Jack
Doan Nghia M.
International Business Machines - Corporation
Petraske Eric
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