Using a partial metal level mask for early test results

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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Reexamination Certificate

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07111257

ABSTRACT:
A method of using special designed wiring level mask(s) to determine product transistor and circuit performance in a chip during the early portion of the product evaluation cycle saves weeks of time that would have been taken by the passage of the wafer through the fab. The method also saves cost during production by identifying wafers for rework at an early stage.

REFERENCES:
patent: 4924589 (1990-05-01), Leedy
patent: 5103557 (1992-04-01), Leedy
patent: 5225771 (1993-07-01), Leedy
patent: 5512397 (1996-04-01), Leedy
patent: 5629137 (1997-05-01), Leedy
patent: 5654127 (1997-08-01), Leedy
patent: 5707881 (1998-01-01), Lum
patent: 5725995 (1998-03-01), Leedy
patent: 5959462 (1999-09-01), Lum
patent: 6281696 (2001-08-01), Voogel
patent: 6562639 (2003-05-01), Minvielle et al.

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