Using a back-off signal to bridge a first bus to a second bus

Details Using a back-off signal to bridge a first bus to a second bus Using a back-off signal to bridge a first bus to a second bus

1998-05-29

1999-10-26

Pan, Daniel H.

Electrical computers and digital data processing systems: input/

Intrasystem connection

Bus access regulation

710128, 711220, G06F 1340, G06F 1338

Patent

active

059744952

ABSTRACT:
A PCI-bus is added to a VESA local bus (VL-bus) computer system using a VL-bus/PCI-bus bridge. The VL-bus/PCI-bus bridge claims a VL-bus cycle by asserting LDEV# to the VL-bus/system-bus bridge. If no other VL-bus device claims the cycle as well, then the VL-bus/PCI-bus bridge translates the cycle onto the PCI-bus and awaits a response from a PCI device. If no PCI device claims a cycle by the PCI-bus device claiming deadline, then the VL-bus/PCI-bus bridge asserts BOFF# to the host and suppresses its assertion of LDEV# when the host repeats the cycle on the VL-bus. The VL-bus/system-bus bridge therefore can translate the repetition of the cycle onto the system bus. When asserting BOFF# to the host, the VL-bus/PCI-bus bridge also asserts the VL-bus device ready signal LRDY# after assertion of BOFF# and releases LRDY# before releasing BOFF#. The VL-bus controller does not receive BOFF# necessarily, but responds to LRDY# by asserting RDYRTN# onto the VL-bus, thereby signifying to all other VL-bus devices that the VL-bus cycle has ended and permitting them to restart their state machines in anticipation of a new VL-bus cycle. The host ignores RDYRTN# while, and only while, BOFF# is asserted.

REFERENCES:
patent: 5448704 (1995-09-01), Spaniol et al.
patent: 5784592 (1998-07-01), Gulick et al.
patent: 5790831 (1998-08-01), Lin et al.
patent: 5805905 (1998-09-01), Biswas et al.

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