Semiconductor device manufacturing: process – Chemical etching – Combined with coating step
Reexamination Certificate
2007-02-20
2007-02-20
Geyer, Scott B. (Department: 2812)
Semiconductor device manufacturing: process
Chemical etching
Combined with coating step
C438S745000, C257SE21002
Reexamination Certificate
active
10902243
ABSTRACT:
An embodiment of the invention is a method of manufacturing an integrated circuit. The method includes forming a capping layer of a back end structure (step706), drilling an extraction line from the capping layer to an inter-metal dielectric layer (step708), performing a supercritical fluid process to remove portions of the inter-metal dielectric layer that are coupled to the extraction line (step710): thereby forming a denuded dielectric region. Another embodiment of the invention is an integrated circuit2having a back-end structure5coupled to a front-end structure4.The back-end structure5having a first metal level22.The first metal level22having metal interconnects15and an inter-metal dielectric layer19.The back-end structure5further containing an extraction line24and a denuded dielectric region25coupled to the extraction line24.
Grunow Stephan
Matz Phillip D.
Papa Rao Satyavolu S.
Brady W. James
Geyer Scott B.
Keagy Rose Alyssa
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
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