Use of SMBus to provide JTAG support

Details Use of SMBus to provide JTAG support Use of SMBus to provide JTAG support

2006-12-12

2006-12-12

Maskulinski, Michael (Department: 2113)

Error detection/correction and fault detection/recovery

Data processing system error or fault handling

Reliability and availability

C714S030000

Reexamination Certificate

active

07149927

ABSTRACT:
An emulator is provided on an electronic assembly that permits external logic to communicate with test logic on the electronic assembly over an electrical interface that has fewer signals than the electrical interface associated with the test logic itself. In this way, external logic can communicate with test logic on the electronic assembly over an interface that uses fewer signal lines thereby permitting the electronic assembly's electrical connector to be smaller than it otherwise would be. In accordance with one embodiment, the test logic's interface comprises a JTAG interface having four signals (with an optional fifth signal) and the interface between the emulator and the external logic comprises a two wire SMBus communication link. In fact, the SMBus interface may already be provided to the electronic assembly for other reasons such as to provide control to and obtain status information from another component on said electronic assembly.

REFERENCES:
patent: 5933614 (1999-08-01), Tavallaei et al.
patent: 6363452 (2002-03-01), Lach
patent: 2004/0225783 (2004-11-01), Erickson et al.
IEEE Std 1149.1(JTAG)Testability, Texas Instruments, 1997 Semiconductor Group (42 p.).

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