Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Insulative material deposited upon semiconductive substrate
Reexamination Certificate
2006-12-12
2006-12-12
Ghyka, Alexander (Department: 2812)
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
Insulative material deposited upon semiconductive substrate
C257SE21269, C257SE21576, C257SE21579
Reexamination Certificate
active
07148157
ABSTRACT:
A method of forming phoslon (PNO) comprising the following steps. A CVD reaction chamber having a reaction temperature of from about 300 to 600° C. is provided. From about 10 to 200 sccm PH3gas, from about 50 to 4000 sccm N2gas and from about 50 to 1000 sccm NH3gas are introduced into the CVD reaction chamber. Either from about 10 to 200 sccm O2gas or from about 50 to 1000 sccm N2O gas is introduced into the CVD reaction chamber. An HFRF power of from about 0 watts to 4 kilowatts is also employed. An LFRF power of from about 0 to 5000 watts may also be employed. Employing a phoslon etch stop layer in a borderless contact fabrication. Employing a phoslon lower etch stop layer and/or a phoslon middle etch stop layer in a dual damascene fabrication.
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Boon Tan Juan
Choo Hsia Liang
Huang Liu
Sudijono John
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