Use of pedestals to fabricate contact openings

Details Use of pedestals to fabricate contact openings Use of pedestals to fabricate contact openings

2007-11-27

2007-11-27

Huff, Mark F. (Department: 1756)

Radiation imagery chemistry: process, composition, or product th

Imaging affecting physical property of radiation sensitive...

Making electrical device

C438S257000, C257S319000

Reexamination Certificate

active

10772520

ABSTRACT:
Nonvolatile memory wordlines (160) are formed as sidewall spacers on sidewalls of control gate structures (280). Each control gate structure may contain floating and control gates (120, 140), or some other elements. Pedestals (340) are formed adjacent to the control gate structures before the conductive layer (160) for the wordlines is deposited. The pedestals will facilitate formation of the contact openings (330.1) that will be etched in an overlying dielectric (310) to form contacts to the wordlines. The pedestals can be dummy structures. A pedestal can physically contact two wordlines.

REFERENCES:
patent: 6355524 (2002-03-01), Tuan et al.
patent: 6541324 (2003-04-01), Wang
patent: 6787415 (2004-09-01), Chung et al.
patent: 2003/0067806 (2003-04-01), Tuan
K. Naruke et al., “A New Flash-Erase EEPROM Cell with a Sidewall Select-Gate on Its Source Side”, IEDM Technical Digest 1989, pp. 603-606.
U.S. Appl. No. 10/402,698, filed Mar. 28, 2003, by Chung et al.
R. Mih et al., “0.18um Modular Triple Self-Aligned Embedded Split-Gate Flash Memory”, 2000 Symposium on VLSI Technology, Digest of Technical Papers, pp. 120-121.

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