Electrical computers and digital processing systems: support – Digital data processing system initialization or configuration – Loading initialization program
Reexamination Certificate
1998-09-24
2002-01-01
Shalwala, Bipin (Department: 2673)
Electrical computers and digital processing systems: support
Digital data processing system initialization or configuration
Loading initialization program
C713S001000
Reexamination Certificate
active
06336185
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates generally to the field of computer systems, and more particularly, to the process of booting for computer systems.
BACKGROUND OF THE INVENTION
All computers, such as personal computers (PC's) and servers, execute “operating system software” that instructs the PC on how to use other programs, termed “application software”, such as word processing and spreadsheet programs. Examples of operating systems include MS-DOS and WINDOWS, manufactured by Microsoft Corporation.
Before a PC or server can run an operating system, it must load the operating system from a disk to the PC's working memory, which is ordinarily random access semiconductor memory (RAM). This function is carried out through a process know as “boot strapping”, or more simply, “booting” the PC. Booting occurs automatically when the PC is first turned on by a process called a “Cold Boot,” or by the user while the computer is running (“Warm Boot”).
Boot strapping usually performs at least two functions, including running a power-on self-test function, or POST, and searching the storage media (floppy diskette or hard drive) for the operating system that it is to load. These functions are controlled by firmware stored in one or more basic input-output systems, or BIOS, inside the computer.
The POST initializes all of the internal hardware and hardware connected to the PC or server that is known to it. Such hardware connected to the PC or server may include memory, and printers, fax machines, and other peripherals. The POST will test each of these items of hardware connected to the computer and place the hardware in an operational state.
Currently, the boot process can take up to several minutes in server systems, or in desktop systems that have large memory and/or device configurations. The boot process is executed in a monolithic format, with each function following the previous function in a defined and logical order. As systems become more complex, boot times will continue to increase. It is highly desirable to be able to reduce the boot time in a simple and economical way that does not require major code or architectural changes to a system.
SUMMARY OF THE INVENTION
Briefly, the invention comprises, in one embodiment, a method for use in a multi-processor system, including a boot strap processor and at least a first processor, for booting the system by executing a plurality of boot sequence tasks, comprising the steps of: causing the boot strap processor to execute at least one task from the plurality of boot sequence tasks; causing the first processor to execute a task in the plurality of boot sequence tasks that is different from the task being executed by said boot strap processor and is executed at least partially in parallel with the execution of the at least one task by the boot strap processor.
In a further aspect of the present invention, a second processor is included, and the method further comprises the step of causing the second processor to execute another task from the plurality of boot sequence tasks that is different from the tasks being executed by the boot strap processor and the first processor, and which execution is at least partially in parallel with the execution by one of the other processors.
In a further aspect of the present invention, the first processor is caused to execute a plurality of boot sequence tasks.
In yet a further aspect of the present invention, each of the boot sequence tasks, after execution is initiated, can be completed without reference to data from any other processor.
In yet a further aspect of the present invention, at least one of the boot sequence tasks of the plurality of boot sequence tasks being executed by the first processor includes the step of waiting to initiate a task until another of the processors has executed a predetermined boot sequence task, before taking an action.
In a further aspect of the present invention, the step of causing the boot strap processor to execute includes the step of providing the first processor with an address to begin execution.
In yet a further aspect of the present invention, the first processor is an application (AP) processor, and further comprising the step of determining how many AP processors are present in the system.
In a further aspect of the present invention, each different one of the processors executes boot sequence tasks in accordance with a different POST Table.
In another embodiment of the present invention, a method is provided for use in a multi-processor system, including a boot strap processor and at least a first and a second application (AP) processors, for booting the system by executing a plurality of boot sequence tasks, comprising the steps of: determining how many AP processors are in the system; causing the boot strap processor to execute a plurality of boot sequence tasks, including providing each of the first and second AP processors with an address in BIOS from which to begin execution and to load a different POST Table for each of the AP processors, which POST Table includes one or more tasks in the plurality of boot sequence tasks; and wherein the first and second AP processors execute at least one boot sequence task in their respective POST Tables which is different from the plurality of boot sequence tasks being executed by the boot strap processor.
In yet a further aspect of the present invention at least one of the processors determines whether another one of the processors has executed a predetermined boot sequence task before executing a predetermined boot sequence task in its POST Table.
In yet a further embodiment of the present invention, a computer program product is provided comprising a computer usable medium having computer readable program code embodied therein for causing a system with multiple processors including a boot strap processor and at least a first processor, to boot the system by executing a plurality of boot sequence tasks in an expedited manner, the computer readable program code in the computer program product comprising: first computer readable code for causing a boot strap processor to execute at least one boot sequence task; and second computer readable code for causing the first processor to execute a boot sequence task that is different from the task being executed by the boot strap processor and is executed at least partially in parallel with execution of the at least one boot sequence task by the boot strap processor.
In yet a further aspect of the present invention, third computer readable code is provided for causing a second processor to execute another task from the plurality of boot sequence tasks that is different from the tasks being executed by the boot strap processor and is executed at least partially in parallel with the execution by one of the other processors.
In a further aspect of the present invention, fourth computer readable program code is provided to cause said first processor to execute a plurality of the boot sequence tasks, wherein at least one of those tasks to be executed by the first processor is not executed until a predetermined task at another processor has been completed.
In yet a further embodiment of the present invention, a multi-processor system is provided that is designed to boot by executing a plurality of boot sequence tasks, with some of those tasks being executed at least partially in parallel by different processors, comprising: a boot strap processor programmed to execute at least one task in the plurality of boot sequence tasks; and a first processor programmed to execute a task in the plurality of boot sequence tasks that is different from the task being executed by the boot strap processor and is executed at least partially in parallel with the execution of the boot sequence task by the boot strap processor.
In yet a further aspect of the present invention, the first processor is an application (AP) processor, and further comprising a second AP processor programmed to execute another task in the plurality of boot sequence tasks that is different from th
French David Lawrence
Sargenti, Jr. William Arthur
Patel Nitin
Phoenix Technologies Ltd.
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