Use of integrated polygen deposition and RTP for...

Coating processes – Coating by vapor – gas – or smoke – Mixture of vapors or gases utilized

Reexamination Certificate

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C427S255350, C427S397700, C427S255700, C438S396000, C438S455000

Reexamination Certificate

active

06605319

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to a method of producing thick films of polycrystalline silicon (polysilicon) or silicon-germanium, from which Micro-Structure Devices (“MSDs”), can be fabricated by a surface micromachining process.
2. Brief Description of the Background Art
MSDs may be purely mechanical devices. These devices may stand alone, or may be electrically connected to microelectronic devices, to carry out electromechanical functions. Increasingly, micromechanical devices are melded with various microelectronic devices in a single substrate/structure, combining functions to create integrated microelectromechanical systems (“MEMS”). Examples of such MEMS devices range from simple sensors and actuators with a single moving part, such as a reed-like polysilicon beam which either senses acceleration or responds to an electromagnetic input, all the way up to complex systems of electrostatic motors acting on loads through micromechanical transmissions. All require reproducible accuracy in every aspect of their construction and functionality, which places extraordinary reliability requirements upon the moving parts of the MEMS.
MSDs may be formed by surface micromachining, where the MSDs are formed by photolithography and etching processes of the kind known in the art of semiconductor processing. The substrate to be micromachined is typically a thick film (generally from 2-20 microns) of polysilicon, attached to an underlying structure which makes up part of the substrate. The underlying base of the substrate may be a silicon wafer of the same sort from which semiconductor devices are fabricated, may be a glass substrate, or may be any other substrate beneficial to the particular device being fabricated. When the MSD is to have moving parts, the polysilicon layer in which an MSD is formed is frequently separated from an underlying potion of the substrate by a “sacrificial layer,” generally of silicon oxide. The sacrificial layer holds elements of the MSD in place during the etch process which creates etched structures and is then removed to free structures which become moving parts. The sacrificial layer, which is selectively etched by chemical species different from those which react with polysilicon, is etched or dissolved away, by either a dry etching or a wet process. This releases the formerly captive moving parts of the MSD.
A common and serious problem in production of the MSDs, and especially the highly integrated MEMS devices, is that the thick polysilicon films utilized for their fabrication tend to be deposited upon the underlying substrate (and sacrificial layers, if any) with considerable residual stress, and a non-uniform stress gradient across the thickness of the film, which can cause the film to split or delaminate and curl. This residual stress and stress gradient may cause an MSD element or feature to deform, and may even cause the entire substrate to deform. This problem is illustrated in
FIGS. 2A-2B
. In
FIG. 2A
, a structure
200
incorporating a silicon substrate
202
has deposited upon it a sacrificial layer
204
of silicon oxide (for example and not by way of limitation), and, on top of that, a thick layer
206
of polysilicon film. The thick polysilicon film
206
has split (
208
), and has delaminated (
210
) from sacrificial layer
204
, curling up at the edge, as a result of residual stresses and an uneven stress gradient over the thickness of the film. In
FIG. 2B
, thick polysilicon film
206
has caused the entire structure
200
to deform, curl upward, along one edge, again as a result of residual stress and stress gradient in the polysilicon film.
Residual film stresses, and especially a non-uniform stress gradient though the film thickness, can be reduced by using an annealing process, but generally these processes require that the structure be exposed to elevated temperatures, typically in excess of about 1,000° C., for an extended period of time. The time period commonly ranges from about 2 hours to about 8 hours for a typical polysilicon film having a thickness ranging from about 2 to about 20 &mgr;m (overlying a substrate about 700 &mgr;m thick). Temperatures of about 1,000° C. and higher may severely compromise any semiconductor elements already present in the structure, causing transistor junctions to migrate due to thermal diffusion of dopant materials, breaking down organic dielectrics, and causing delamination of interfaces between different materials, for example.
What is needed is a means of reducing the levels of residual stress in a thick polysilicon film, and assuring that the remaining stress gradient is uniform over the thickness of the film, while avoiding damage to underlying structures.
SUMMARY OF THE INVENTION
The method of the present invention involves depositing a plurality of relatively thin layers of polysilicon film over one another to form a thick layer of polysilicon film. Each thin layer has a thickness ranging from about 500 Å to about 2,000 Å, with the final combined thickness of all layers ranging from about 20,000 Å to about 200,000 Å. One commonly used method for depositing a layer of polysilicon is by Low Pressure Chemical Vapor Deposition (“LPCVD”). This technique or other techniques known in the art may be used to deposit each thin layer of polysilicon. After a thin film deposition step, an annealing step is performed by Rapid Thermal Processing (“RTP”). Rapid Thermal Anneal (“RTA”) may optionally but advantageously be carried out in the presence of hydrogen. The use of RTA rather than furnace annealing permits much shorter annealing times, and the use of hydrogen forming gas during RTA, for example, permits the use of lower processing temperatures, typically about 20% lower relative to a customary anneal. The hydrogen is believed to diffuse into grain boundaries of the polysilicon, reducing stress in the deposited film. By controlling the stress of at least a specific number of the thin layers of polysilicon film, the stress gradient across the composite thick film layer can be controlled as well. A series of film depositions, typically followed by rapid thermal anneal, is used to produce the desired, nominal total thickness polysilicon film. As previously mentioned, this method is generally useful for producing polysilicon films in the range of from about 2 microns to about 20 microns, and typically in the range of about 5-20 microns.
An alternative to a polysilicon film is a silicon-germanium film, where the germanium content ranges from about 4% by weight to about 20% by weight. The electrical conductivity of this material is comparable with that of polysilicon; however, the annealing/heat-treatment temperature for stress relief may be in the range from about 380° C. to about 500° C. This lower annealing/heat-treatment temperature is advantageous when the substrate includes aluminum contacts and interconnects, for example.
During development of a film deposition/rapid thermal anneal process, after each annealing step, a measurement may be made of the residual stress in the film. This measurement can be made directly, as by x-ray spectrographic analysis of the film, or inferentially, as by measurement of the flatness of the silicon wafer, which reveals any deformation of the wafer caused by the residual stress and uneven stress gradient in the o polysilicon film. This flatness measurement can be made, among other methods, by means of an optical flatness measuring tool, or a pin-displacement device, or advantageously by a capacitance device. A pin displacement device or capacitance device may be conveniently built into a wafer handling tool used to transfer the wafer within or among the processing chambers.
Initially, for a given process, based upon the results of the stress and stress gradient measurement, appropriate adjustments may be made to the process parameters for subsequent deposition and/or rapid thermal anneal steps, to optimize the method, providing an aggregate residual film stress which meets nominal requirements, an

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