Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Including adhesive bonding step
Reexamination Certificate
2001-10-17
2003-03-04
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Including adhesive bonding step
Reexamination Certificate
active
06528352
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to semiconductor manufacturing methods and more particularly to temporary electrical connections for use in temporary chip attach applications.
2. Description of the Related Art
In the microelectronics industry, there are Known-Good-Die (KGD) chips, which are chips that have been tested and burned-in, and are known to be good prior to sale. Moreover, it is necessary that chips used to populate a multi-chip module (MCM) be known-good prior to being placed on the MCM, so that it is not necessary to reflow the module excessive times to replace chips that may be defective.
In order to produce KGD chips, one method is to test the die on a ceramic carrier. The carrier can be a standard single-chip substrate. However, the key attribute of the process should be the ability to remove the chip from the carrier without damaging the chip or the solder balls on the chip, so that the chip can then be used in its final application. Conventional methods such as the flip-chip attach is common in the electronics industry, but problems arise when it is necessary to temporarily place a chip on a carrier in order to provide sufficient electrical connectivity to facilitate test and burn-in at elevated temperatures, and then easily remove the chip from the TCA (temporary chip attach) carrier without damage to the chip solder balls.
There have been several ways in which TCA has been accomplished in the past. First, in the “selective plating” process a small nickel bump, 1.4×2 mils, is plated onto a conventional molybdenum via (5 mils diameter). A chip is then placed onto the TCA carrier which has the Ni bumps, and the chip is joined to the carrier by reflowing the solder balls. The solder wets to the Ni, but not to the Mo. The chip is then tested and burned-in. After burn-in, the chip can be removed from the carrier by shearing it off the carrier. Because the interconnection between the substrate and chip is restricted to the small solderable area of the Ni bump, it is possible to shear off the chip without too much damage to the solder balls and chip BLM (Ball-Limiting Metallurgy).
The second process involves the use of the selectively plated carriers described in the first process above, but instead using “hot shear” to shear off the chips after burn-in. Hot shear is conducted at approximately 250° C.-300° C., where the solder is softer, thus imparting less stress to the chip BLM during shear. As with the above process, decreased C4 solder bump pitch, and decreased BLM diameter drives the need for lower removal forces during TCA, or there can be damage to the chip C4 solder ball or BLM.
The third process involves the use of selectively plated carriers as in the first process above, but using a “hot vacuum” to remove the chips. In this process, the solder is allowed to become fully molten and the chip is pulled off the substrate, not sheared off. This imparts less stress to the chip BLM.
A fourth process involves the use of a smaller punched substrate TSM (top surface metallurgy) via, with a highly gritted paste to enable a weaker connection between the chip and substrate without the need for the selective plating process.
In a fifth process, use of a high melt/low melt structure is employed. For instance, a low melt solder of sufficiently low volume is applied to the substrate TSM pad, and then a chip is placed and joined to the substrate by melting the low-melt solder, without melting the higher-melting C4 solder bump. This has advantages in that the solder bump does not have to be fully reflowed, and in order to remove the bump, simply heating above the low-melt temperature is required.
Finally, a sixth process involves the use of a substrate that has been plated in such a manner so as to have dendrites growing on the substrate TSM vias. A chip is then placed on these dendritic vias, and clamped such that the dendrites penetrate the solder bumps, providing electrical contact during burn-in. However, there is a need for a new “temporary chip attach” process, which serves as a low-cost alternative to the above-identified processes.
SUMMARY OF THE INVENTION
In view of the foregoing and other problems, disadvantages, and drawbacks of the conventional KGD processes, the present invention has been devised, and it is an object of the present invention to provide a structure and method for a standard ceramic carrier to be converted into a temporary chip attach carrier by the use of a conductive adhesive material that is applied to the substrate TSM vias.
In order to attain the object suggested above, there is provided, according to one aspect of the invention a structure and process wherein a chip can be placed on the carrier, and clamped down to enable electrical conduction from the chip solder ball, through the conductive adhesive, and to the metallic via on the substrate. The module can then be electrically tested at time-zero, sent through burn-in at elevated temperatures for a given time, and electrically tested during burn-in and post burn-in. When the test and burn-in are completed, the chip can be released from the substrate, and the bond between the conductive adhesive and the substrate will be of proper adhesive quality to remain on the substrate, and not stick to the solder balls on the chip. Thus, the ceramic carrier can be used again with a new chip in need of testing, and the tested chips can be permanently joined to other modules after test, with no contamination on the solder balls.
The advantages of the current invention are numerous. For example, the connection between the conductive adhesive and the solder ball is weak enough to require sufficiently less force to separate the chip from the substrate, but still enable enough electrical connectivity during burn-in.
Moreover, the current invention is simple, and requires less force to remove the chips after burn-in. Also, since the solder balls are never reflowed in the current invention, there are more allowable reflows available for that chip when used on an MCM carrier, etc.
Furthermore, the current invention eliminates the need for the selectively plated TCA carrier altogether, and also offers the least stress on the C4 balls and chip BLM during removal. The selective plating process costs are significant, therefore eliminating it would be a huge savings on TCA carrier costs. Also, the chip reflow is eliminated in the current invention, saving additional TCA processing costs.
The current invention is also advantageous because the solder does not stick well to the conductive adhesive, so the carrier can be reused frequently, etc. Additionally, the advantage of the conductive adhesive is that it accommodates for variations in solder bump and substrate TSM via heights, offering a “cushion”. The current invention requires much less force for contact. In this regard, it is noteworthy that the solder balls have an oxide layer on them, and storage of the chips in an N
2
atmosphere minimizes surface oxidation of the solder bumps. In a preferred embodiment, the oxidation could be minimal enough to enable good electrical connection by merely clamping the chip onto the substrate which has conductive adhesive on it. As such, it is unnecessary to have some impingement of the oxide layer on the chip for electrical connectivity. Conversely, if there is a lot of oxidation, then the conductive adhesive can be formulated with silver particles of proper shape, etc., and a proper cure of the material is used such that there are some particles protruding from the adhesive which would act similar to dendrites. Thus, this is another additional benefit of the present novel conductive adhesive concept. However, this aspect is not necessary for the concept to work.
A structure and method for converting a standard ceramic carrier into a temporary chip attach carrier is disclosed, wherein the device comprises a substrate, a plurality of metal vias interspersed in the substrate, a carrier layer further comprising a cavity dam with a plurality of holes filled with
Jackson Raymond A.
Knickerbocker John U.
Lombardi Thomas E.
Ostrander Amy B.
Le Thao P.
McGinn & Gibb PLLC
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