Use of bus hold to prevent bus contention between high speed...

Details Use of bus hold to prevent bus contention between high speed... Use of bus hold to prevent bus contention between high speed...

2005-08-30

2005-08-30

Dang, Khanh (Department: 2111)

Electrical computers and digital data processing systems: input/

Intrasystem connection

Bus access regulation

C375S219000

Reexamination Certificate

active

06938112

ABSTRACT:
The present invention discloses a method and apparatus for preventing contention on a common data bus between a CPU and a peripheral device with which the CPU exchanges data. A transceiver with bus hold is used to connect the bus connections of the CPU and peripheral. Control logic receives a CPU data strobe signal and generates control signals for the transceiver and the peripheral. After these control signals go inactive, the peripheral outputs transition to the high impedance state and the bus hold circuits maintain the last peripheral output data valid for reading by the CPU at the end of its read cycle. As soon as the CPU goes to a write cycle and drives the data bus, the bus hold circuits automatically switch to follow the new data.

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