Use of a silicon carbide adhesion promoter layer to enhance...

Details Use of a silicon carbide adhesion promoter layer to enhance... Use of a silicon carbide adhesion promoter layer to enhance...

2002-08-27

2003-10-07

Nelms, David (Department: 2818)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S622000

Reexamination Certificate

active

06630396

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to a method of integrating chemical vapor deposition copper (Cu) with low-k fluorinated amorphous carbon (a-F:C) in single level and multilevel damascene structures, and more particularly, to a method of providing a thin layer of an adhesion promoter material, such as relatively hydrogen-free hydrogenated silicon carbide (SiC:H), between layers of silicon nitride (Si
3
N
4
) and a-F:C to enhance the adhesion and mechanical properties of the damascene structure.
BACKGROUND OF THE INVENTION
The designers and makers of large scale integrated circuits continue to make ever-smaller devices which allow for greater speed and increased device packing densities. The size of individual features (e.g., the transistor gate length) on ultra-large-scale (ULSI) circuits is shrinking to less than 0.25 microns. The resultant increase in packing densities on semiconductor chips, and the associated increase in functionality, has greatly increased the number and density of interconnects on each chip.
Smaller on-chip devices, packed closer together, with increased functionality and complexity, require interconnects (lines, vias, etc.) which are smaller, more complex (e.g., more wiring levels), and more closely-spaced. The smaller sizes of the interconnects, which increases resistance, and closer interconnect spacing, leads to resistance-capacitance (RC) coupling problems including propagation delays and cross talk noise between inter-level conductors. As interconnect lines, both inter-level and intra-level, become smaller and more closely spaced, RC delays become an increasing part of the total signal delays, offsetting any speed advantage derived from smaller device sizes. RC delays thus limit improvement in device performance. Small conductor size increases the resistivity (R) of metal lines and smaller inter-line and inter-level spacing increases the capacitance (C) between lines. Use and development of lower-resistivity metals such as copper will continue to reduce the resistivity of interconnect lines. Capacitance can be reduced by employing lower dielectric constant (i.e., lower-k) dielectric materials.
Since capacitance (C) is directly proportional to the dielectric constant (k) of the interconnect dielectric, RC problems presented by ULSI circuits can be reduced if a low-dielectric-constant (low-k) material is used as the insulating material disposed between and around the inter-level and intra-level conductors (the dielectric being referred to herein as the “interconnect dielectric” or the “interconnect dielectric material”). Industry is seeking a suitable replacement for silicon dioxide (SiO
2
), which has long been used as a dielectric in integrated circuits. Silicon dioxide has excellent thermal stability and relatively good dielectric properties, having a dielectric constant of around 4.0.But there is now a need for an interconnect dielectric material which is suitable for use in IC circuit interconnects and which has a lower dielectric constant than does SiO
2
.
After a long search for possible low dielectric constant materials to be used as an interconnect dielectric in ULSI circuits, the candidates have been narrowed down to a few, depending upon the desired application. One of the promising materials, which has been actively studied recently and has received considerable attention, is fluorinated amorphous carbon (a-F:C).
The dielectric constant of a-F:C films is lowered as the fluorine concentration in the material is increased. In the plasma enhanced chemical vapor deposition process (PECVD) process, the fluorine concentration of the films depends on the fluorine to carbon ratio in the discharge, which is established by the feed gas composition, RF power input, substrate temperature, and total pressure. The thermal stability is closely related to the degree of cross-linking among the polymer chains. The greater the degree of cross-linking, the more tightly bound the structures are, and the higher the thermal stability. In the PECVD process, either raising the substrate temperature, enhancing the ion bombardment, or applying a low frequency plasma energy, can increase the cross-linking in the fluorocarbon films. Higher temperature deposition has the disadvantage of inevitably reducing the fluorine concentration, thereby increasing the dielectric constant. Moreover, higher temperature deposition also leads to poor adhesion between the polymer layer and the SiO
2
and Si
3
N
4
layers due to increased thermal stress, and causes higher leakage current in the films.
Fluorinated amorphous carbon has a dielectric constant k below 3.0 and, depending on the proportion of fluorine (F) in the film, can have a dielectric constant in the range of 2.0 to 2.5. Early experience with these polymers shows that films deposited at room temperature may have a dielectric constant as low as 2.1 and thermal stability up to 300 C. Further experimentation showed that if the a-F:C films were deposited at higher substrate temperatures, the thermal stability could be improved up to 400 C., but the dielectric constant increased above ~2.5. It has heretofore not been possible to prepare a-F:C films with suitable low-dielectric-constant properties (k less than 2.5), and a thermal stability above 400° C. Temperatures in the sintering range (450° C.), typical for manufacturing ULSI chips, cause excessive shrinkage of the a-F:C film, probably due to fluorine volatilization. Mechanical strength and adhesion problems also are obstacles to the use of a-F:C as an interconnect in high-density integrated circuits. In particular, the poor adhesion between a-F:C and the barrier layer, such as silicon nitride (Si
3
N
4
), has been a problem for years.
Recent research and development on low dielectric constant (low-k) materials indicates that the integration of Cu with low-k materials is one of the key issues in choosing candidates for future interlayer dielectrics in single-level and in multi-level damascene structures. Although many low-k candidates show excellent electrical properties, a successful Cu/low-k integration has still not been accomplished due to difficulties in the fabrication of Cu/low-k based damascene structures. In these structures, the major reliability issues are the adhesion of low-k films, such as a-F:C, with SiO
2
, Si
3
N
4
and barrier layers (liners), the mechanical strength of the low-k materials during chemical mechanical polishing (CMP), and the stability of the single and multi-level damascene structures under heat treatment, patterning and plasma etching. Since multilevel wiring is the ultimate goal for the Cu/low-k interconnection, fabrication of such multi-level damascene structures is critical.
Accordingly, it would be advantageous to have a dielectric material, alternatively referred to herein as an “interconnect dielectric,” for use in interconnect structures of integrated circuits which has a low dielectric constant (k=3.0 or less) and improved thermal stability (up to 450° C.), thus providing a suitable lower-k replacement for silicon dioxide dielectric.
It would also be advantageous to have a a-F:C film which has a dielectric constant of 2.5 or less which is thermally stable to 450° C.
It would also be advantageous to have a method of forming low-k a-F:C films on silicon substrates using plasma enhanced chemical vapor deposition (PECVD) techniques, wherein the resultant a-F:C film is substantially stable up to 450° C.
It would further be advantageous to have a method of forming multiple a-F:C films on silicon substrates wherein the resultant multiple layered a-F:C/Si
3
N
4
structure is stable up to 450° C.
It would be advantageous to have a method of forming a thin layer of promoter material, such as SiC, to enhance the adhesion and mechanical properties of a-F:C films with SiO
2
and/or Si
3
N
4
layers.
It would be advantageous to have a method of forming a promoter layer which may also serve as a barrier to reduce diffusion of fluorine atoms through the layered structure.
It would be advantageous to have a method of forming Cu

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