Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Reexamination Certificate
2010-01-13
2010-10-19
Barnie, Rexford N (Department: 2819)
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Bus or line termination
C326S082000, C326S086000
Reexamination Certificate
active
07816942
ABSTRACT:
A high-speed universal serial bus (USB) transceiver includes a voltage-mode architecture for generating a USB signal. The voltage mode architecture reduces power consumption by reducing the current requirements for high-speed USB communications. The USB transceiver can include a reference voltage generator, a resistive element, and a switching element for completing and breaking a circuit including the reference voltage generator, the resistive element, and a data pin of a USB port to generate half of the differential USB signal (e.g., the D+ signal). A similar circuit can be used to generate the other half of the differential USB signal (i.e., the D− signal). The resistive element can be a set of parallel resistors in the transceiver, with the set of parallel resistors being specifically selected from a larger population of resistors to provide the specified resistance (45Ω±10%) in the USB transceiver.
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Chong Euhan
Howe Scott
Lacy Cameron
Toffolon Dino A.
Barnie Rexford N
Bever Hoffman & Harms LLP
Harms Jeanette S.
Synopsys Inc.
Tran Thienvu V
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