Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2005-11-21
2008-12-02
Chiang, Jack (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C716S030000
Reexamination Certificate
active
07461366
ABSTRACT:
A method for laying out custom integrated circuits includes the steps of preliminarily laying out a custom integrated circuit using a plurality of libraried standardized programmed cells (p-cells). Buildcode representations are then assigned for each of a plurality of circuit components and features thereof to realize customization of at least a portion of the plurality of p-cells. A final layout of the custom integrated circuit is then generated using the buildcode representations.
REFERENCES:
patent: 5097422 (1992-03-01), Corbin et al.
patent: 5920486 (1999-07-01), Beahm et al.
patent: 6775808 (2004-08-01), Raje et al.
patent: 6804809 (2004-10-01), West et al.
patent: 7134099 (2006-11-01), Collins et al.
patent: 2002/0006695 (2002-01-01), Hatsch et al.
patent: 2005/0216873 (2005-09-01), Singh et al.
patent: 2005/0229142 (2005-10-01), Boppana et al.
patent: 2006/0053398 (2006-03-01), Cox et al.
patent: 2006/0253827 (2006-11-01), Karniewicz
patent: 2006/0288315 (2006-12-01), Perez et al.
patent: 2007/0094628 (2007-04-01), Dao
Chiang Jack
Fogg & Powers LLC
Intersil America's Inc.
Parihar Suchin
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