Universal single-ended parallel bus

Electronic digital logic circuitry – Interface – Current driving

Reexamination Certificate

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C326S082000, C326S090000

Reexamination Certificate

active

07135889

ABSTRACT:
A high speed data communication system uses a single-ended bus architecture with a reference signal extracted from a differential periodic signal that is transmitted along with single-ended data. By using a periodic signal such a clock signal with approximately 50% duty cycle, a much more stable and accurate reference signal is established for receiving single-ended data.

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