Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2007-02-20
2007-02-20
Baderman, Scott (Department: 2114)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C714S028000
Reexamination Certificate
active
10434820
ABSTRACT:
An integrated circuit for a smart card may include a universal serial bus (USB) transceiver for communicating with a USB host device, and a microprocessor connected to the USB transceiver and operable in a test mode and a user mode. When in the test mode, the microprocessor may perform a test operation based upon receiving at least one test vendor specific request (VSR) from the USB host device via the at least one USB transceiver. By way of example, the test operation may include scan testing the microprocessor's control logic, detecting a status of at least one buffer and communicating the status to the USB host device, writing test data to at least one designated buffer and sending the test data from the at least one designated buffer to the USB host device, and/or operating with reduced power.
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John Garney et al. “Universal Serial Bus Specification Revision 2.0”. Apr. 27, 2000. pp. 1, 145.
Fruhauf Serge
Leaming Taylor J.
Pomet Alain C.
Baderman Scott
Jorgenson Lisa K.
Lohn Joshua
Regan Christopher F.
STMicroelectronics Inc.
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