Universal serial bus PC synchronization algorithm for...

Electrical computers and digital data processing systems: input/ – Input/output data processing – Transfer direction selection

Reexamination Certificate

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Details

C710S033000, C710S048000, C712S225000, C709S200000

Reexamination Certificate

active

06587898

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to computer systems. More particularly, the present invention is directed to communication between computer resources and USB-compatible peripheral devices.
2. Description of the Related Art
Referring to
FIG. 1
typical computer systems, such as computer
14
, includes one or more system buses
22
placing various components of the system in data communication. For example, a microprocessor
24
is placed in data communication with both a read only memory (ROM)
26
and random access memory (RAM)
28
via the system bus
22
. The ROM
26
contains among other code, the Basic Input-Output system (BIOS) which controls basic hardware operation such as the interaction with peripheral components such as disk drives
30
and
32
, as well as the keyboard
34
. The RAM
28
is the main memory into which the operating system and application programs are loaded and affords at least 32 megabytes of memory space. The memory management chip
36
is in data communication with the system bus
22
to control direct memory access (DMA) operations. DMA operations include passing data between the RAM
28
and the hard disk drive
30
and the floppy disk drive
32
.
Also in data communication with the system bus
22
are various I/O controllers: a keyboard controller
38
, a mouse controller
40
and a video controller
42
. The keyboard controller
38
provides a hardware interface for the keyboard
34
, the mouse controller
40
provides the hardware interface for a mouse
46
, or other point and click device, and the video controller
42
provides a hardware interface for a display
48
. Each of the aforementioned I/O controllers is in data communication with an interrupt controller over an interrupt request line. The interrupt controller is in data communication with the processor to prioritize the interrupts it receives and transmits interrupt requests to the processor. A drawback with the aforementioned architecture is that a limited number of interrupt request lines are provided. This limited the number of I/O devices that a computer system could support.
A Universal Serial Bus (USB) specification has been developed to increase the number of peripheral devices that may be connected to a computer system. The USB specification is a proposed standard recently promulgated by a group of companies including Compaq Computer Corporation, Digital Equipment Corporation, International Business Machines Corporation, Intel Corporation, Microsoft Corporation, and Northern Telecom Limited. Described below are various aspects of the USB relevant to a complete understanding of the present invention. Further background concerning the USB may be obtained from USB Specification, Revision 1.1.
The USB is a serial bus that supports data exchanges between a host computer and as many as 127 devices on a single interrupt request line. This proved beneficial, especially when employed with processors that supported Intel's System management Mode architecture, such as Intel's Pentium® line of processors. Specifically, it was found that effectuating USB transactions in a processor's real-address mode limited the software platforms that may be supported for USB legacy support. Many of the software platforms remapped the interrupt vector table thereby frustrating transactions over the universal serial bus for USB legacy support. As a result, it is standard in the computer industry for USB legacy support to effectuate USB transactions when the processor operates in the system management mode (SMM).
A system management interrupt (SMI) applied to the SMI pin of the processor invokes the SMM mode. The SMI results from an interrupt request sent by, inter alia, a USB host controller. In response, the processor saves the processor's context and switches to a different operating environment contained in system management RAM (SMRAM). While in SMM, all interrupts normally handle by the operating system are disabled. Normal-mode, i.e., real-mode or protected-mode, operation of the processor occurs upon receipt of a resume (RSM) on the SMI pin. As can be readily seen, all USB transactions are associated with a common interrupt line, namely, the SMI pin.
To facilitate communication between the computer system and 127 peripheral devices over a common serial line, the USB specification defines transactions between a host in data communication with a plurality of devices over interconnects. The USB interconnect defines the manner in which the USB devices are connected to and communicate with the USB host controller. There is generally only one host on any USB system. A USB interface to the host computer system is referred to as the host controller. The host controller may be implemented in a combination of hardware, firmware, or software. USB devices are defined as (1) hubs, which provide additional attachment points to the USB, or (2) functions, which provide capabilities to the system; e.g., an ISDN connection, a digital joystick, or speakers. Hubs indicate the attachment or removal of a USB device in its per port status bit. The host determines if a newly attached USB device is a hub or a function and assigns a unique USB address to the USB device. All USB devices are accessed by a unique USB address. Each device additionally supports one or more endpoints with which the host may communicate.
FIG. 2
shows a computer system that employs a universal serial bus. The host computer
50
includes the I/O driver
52
, a USB driver
54
and USB interface logic circuit
56
. The I/O driver
52
continues to model the I/O device
58
as a group of registers. To access a hardware register in the I/O device
58
, however, the I/O driver
52
first passes its read or write data request to the USB driver
54
that coordinates construction and transmission of the Token, Data and Handshake packets required by the USB protocol for transferring data to or from the I/O device
58
. The CPU with USB port (device interface)
60
is connected to the I/O device
58
and is configured by the firmware
62
to act as an interface allowing I/O device
58
to communicate with the host via the USB. Device interface
60
receives and decodes incoming packets (e.g. host generated Token packets) and generates complimentary Data or Handshake packets needed to complete a data transfer between I/O device
58
and host computer
50
. A drawback with USB-compatible peripheral devices is that many resources of existing computer systems, including the operating system, is not able to communicate with the same.
Recognizing the aforementioned problem with USB transactions, U.S. Pat. No. 5,896,534 to Pearce et al. discloses a conversion methodology to increase microprocessor performance characteristics. This is achieved using the System Management Mode (“SMM”) of the microprocessor to provide transparent support of hardware components that include features unsupported by executing application and operating system programs. In one embodiment, a PC system includes code that supports only conventional but unavailable communication interfaces, but is equipped with a universal serial bus (“USB”) controller. Although the USB controller is unsupported by the executing code, the application and operating system programs, the conversion methodology utilizes system management mode to facilitate transparent support for the USB controller. In SMM, a CPU executes SMM code independently of the operating system(s). The conversion methodology causes entry of SMM upon any I/O operation intended for the supported but unavailable conventional communication interfaces. The SMM code provides data from the USB controller in a format recognizable to the requesting non-supporting software. SMM code supports providing data that would otherwise be provided to supporting software. As mentioned above, however, multiple peripheral devices are typically connected to a common I/O port in a computer system employing the USB communication protocol. This increases the probability that information in

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