Universal serial bus device controller comprising a FIFO associa

Details Universal serial bus device controller comprising a FIFO associa Universal serial bus device controller comprising a FIFO associa

1997-08-12

1999-10-26

Lee, Thomas C.

Electrical computers and digital data processing systems: input/

Input/output data processing

Input/output data buffering

710 4, 710 52, G06F 1314

Patent

active

059744863

ABSTRACT:
A versatile USB controller comprises a serial interface engine (SIE) for connection with a host. The SIE is capable of simulating a disconnect/connect sequence in situations where a reboot of the device is appropriate. The controller further includes a control store for keeping track of multiple endpoints of a device. A FIFO provides data transfer between each of the endpoints and the host. A state machine provides transaction sequencing with the host for each endpoint. In a variation of the preferred embodiment, a second FIFO is included to provide additional buffering capability.

REFERENCES:
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patent: 5860119 (1999-01-01), Dockser
CYPRESS Data Sheet for CY7C634xx Controllers, Mar. 21, 1997.
INTEL Data Sheet for 8x930Ax USB Controller, 1997.
CAE Data Sheet, Feb. 1997.

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