Universal serial bus controller with a direct memory access...

Electrical computers and digital data processing systems: input/ – Input/output data processing – Direct memory accessing

Reexamination Certificate

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Details

C710S009000, C710S021000, C710S022000, C710S053000, C710S057000, C709S212000, C709S234000

Reexamination Certificate

active

06266715

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to microcontrollers and more particularly, to a universal serial bus (USB) controller with a direct memory access (DMA) mode.
2. Description of the Related Art
Microcontrollers
As technology advances, computer system components are providing specific services which previously were offered by a microprocessor or the computer system as a whole. A centerpiece of this advancing technology is known as a microcontroller, or embedded controller, which in effect is a microprocessor as used in a personal computer, but with a great deal of additional functionality combined onto the same monolithic semiconductor substrate (i.e., chip). In a typical personal computer, the microprocessor performs the basic computing functions, but other integrated circuits perform functions such as communicating over a network, controlling the computer memory, and providing input/output with the user.
In a typical microcontroller, many of these functions are embedded within the integrated circuit chip itself. A typical microcontroller, such as the Am186EM or Am186ES by Advanced Micro Devices, Inc., of Sunnyvale, Calif., not only includes a core microprocessor, but further includes a memory controller, a direct memory access (DMA) controller, an interrupt controller, and both asynchronous and synchronous serial interfaces. In computer systems, these devices are typically implemented as separate integrated circuits, requiring a larger area and increasing the size of the product. By embedding these functions within a single chip, size is dramatically reduced, often important in consumer products.
From a consumer products designer's viewpoint, often the particular combination of added features make a particular microcontroller attractive for a given application. Many microcontrollers are available that use the standard 80×86 microprocessor instructions, allowing for software to be easily developed for such microcontrollers. Because of the similar execution unit instruction sets, the added features often become principal differentiating criteria between particular microcontrollers.
In implementing microcontrollers in embedded systems, another common requirement or desirable feature is the reduction of the bandwidth needed by any particular portion of the microcontroller in negotiating with other portions. For example, the core of a microcontroller is the execution unit, which is essentially a microprocessor core. An execution unit should be free to perform the programmed task to which it is dedicated, rather than spending time waiting on other units within the microcontroller.
Direct Memory Access
Often helpful in freeing up the execution unit are direct memory access (DMA) units, timer control units, and interrupt control units. Such units off-load the tasks of waiting for certain external transactions to take place, and, in the case of the DMA unit, actually off-loading the task itself. The DMA unit can be programmed to perform transfers between memory locations, or between memory locations and an input/output port. Off-loading these tasks, the execution unit is freed from having to wait for such transfers to take place, and as such, can increase the overall speed of the computer system.
The DMA unit functions, without involving the microprocessor, by initializing control registers in the DMA unit with transfer control information. The transfer control information generally includes the source address (the address of the beginning of the block of data to be transferred), the destination address (the address where the beginning of the block of data is to be transferred), and the size of the data block. Unlike the microprocessor which stores the data internally before distributing the data to the proper address, the DMA unit provides address and bus control signals to and from a peripheral device such that the peripheral device can access memory directly for a read or a write cycle.
Specific channels are implemented in a DMA unit to allow peripheral devices to transfer data directly to or from other peripheral devices or memory devices. A channel can be activated via a DMA request signal (DREQ) from a peripheral device or memory device. The DMA unit receives the DREQ, provides a DMA acknowledge signal (DACK), and transfers the data over the channel to or from the peripheral device or memory device. Peripheral devices which commonly use DMA channels include DRAM (dynamic RAM) refresh circuitry, sound cards, SCSI host adapters, parallel ports, tape cards, network cards, modems, and floppy disk controllers.
Universal Serial Bus
Turning now to the communications side of the embedded systems industry, specialized microcontrollers with integrated communication features are becoming particularly attractive for communications applications. A microcontroller, or an embedded controller, is uniquely suited to combining functionality onto one monolithic semiconductor substrate (i.e., chip). By embedding various communication features within a single chip, a communications microcontroller may support a wide range of communication applications.
An important component of a communications microcontroller has been a Universal Serial Bus (USB) controller. The Universal Serial Bus is a serial bus standard that implements a communication architecture and interface to allow for the connection of multiple peripherals through a single port while also providing digital telephony capabilities. A Universal Serial Bus is used to connect a USB device with a USB host. For example, a Universal Serial Bus may connect a microcontroller (i.e., USB device) to a computer system (i.e., USB host). Each USB device is composed of a collection of independently operating endpoints. An endpoint, which is the ultimate consumer or provider of data, is a uniquely identifiable portion of a USB device that is the terminus of a communication flow between the USB host and the USB device.
A few characteristics which define the operation of an endpoint include the transfer type for an endpoint, the direction data is transferred between an endpoint and a host, and the maximum packet size (MaxPacketSize) that an endpoint is capable of sending or receiving. An endpoint must transmit data payloads with a data field less than or equal to MaxPacketSize.
One type of data transfer supported by USB architecture is isochronous data transfer. Isochronous data is continuous and real-time in creation, delivery, and consumption. Isochronous data must be delivered at the rate at which the isochronous data is received. For an isochronous pipe, USB limits the maximum packet size (i.e., maximum data payload size) to 1023 bytes. Details concerning isochronous data transfer with USB devices and other aspects of a Universal Serial Bus are provided by the Universal Serial Bus Specification, Revision 1.0, Jan. 15, 1996, Compaq Computer Corporation, Digital Equipment Corporation, IBM PC Company, Intel Corporation, Microsoft Corporation, NEC, Northern Telecom.
The Universal Serial Bus Specification specifies that USB devices are required to supply some buffering of data. Buffers provided by a USB endpoint provide space for data to accumulate until it is time for the USB data to move over a Universal Serial Bus. Buffering was intended by the originators of USB to provide a source and destination for USB data. Accordingly, the conventional use of a USB buffer (e.g., FIFO) has been to place a packet of data in the buffer, wait for a request for that data and then remove the packet of data from the buffer.
So far as is known, conventional USB controllers have not allowed for reception of back to back USB packets. For example, in the case of a USB host with data to provide to a USB device, the USB host fills up the USB buffer of the USB device. Additional requests by the host to provide data cannot be handled unless multiple USB buffers are supported by the USB device. Even with multiple USB buffers, however, eventually a request by the host to provide data cannot be handled.
SUMMARY OF THE INVEN

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