Universal PECL/LVDS output structure

Details Universal PECL/LVDS output structure Universal PECL/LVDS output structure

2001-08-02

2003-06-17

Tokar, Michael (Department: 2819)

Electronic digital logic circuitry

Interface

Current driving

C326S068000, C327S538000

Reexamination Certificate

active

06580292

ABSTRACT:

BACKGROUND OF THE INVENTION
The invention generally relates to electronic devices, and more particularly to an output structure for PECL (Motorola Positive Emitter Coupled Logic)/LVDS (Low Voltage Differential Signaling) signaling methods.
In telecom and networking systems, signaling methods have been used to route signals from one device to another. In many high speed signaling methods, both PECL and LVDS point-to-point techniques have been used. PECL is a standard developed by Motorola, in which the output node voltages are Vdd−1 volts and Vdd−1.6 volts. On the other hand, LVDS is the EIA-644 standard, in which the output differential voltage swing is ±400 mV. Many designers and manufacturers of telecom and networking system products would like the flexibility to choose either PECL or LVDS signaling levels for their designs. However, due to the performance limitation on LVDS which requires very low capacitance on the output node, the output driver that implements the signaling methods is limited to only one characteristic, i.e., it would have to be either PECL or LVDS, but not both. Otherwise, neither would perform to the PECL/LVDS specifications.
Attempts have been made to combine two output drivers to separately implement PECL and LVDS. Typically, these two output drivers are connected in parallel, and a designer may choose to enable one of the drivers to implement one of PECL and LVDS for a particular design. However, this type of circuit has a number of disadvantages including large size, high cost and inflexibility, etc.
Therefore, there is a need for an output structure that uses the same circuitry to implement the two different signaling schemes on one IC device so as to give designers the flexibility in their designs.
SUMMARY OF THE INVENTION
The invention provides an output structure that uses the same circuitry to implement two different signaling methods, PECL and LVDS, on one IC device. This gives designers the flexibility in their designs.
According to an embodiment of the invention, an output circuit is provided and comprises a first output block having a first output port and a second output block having a second output port. The first and second output blocks are configurable to provide first output characteristics at the first and second output ports compatible with a first signaling method (e.g., the PECL standard), in response to first external control signals. The two output blocks also provide second output characteristics at the first and second output ports compatible with a second signaling method (e.g., the LVDS standard), in response to second external control signals.
According to this embodiment of the invention, the first and second output blocks re substantially identical to each other. Each output block includes a switchable current source that supplies a selected one of a plurality of predetermined currents at its output port, in response to selected external control signals.
With the present invention, the same circuitry is used and functions as two drivers on one IC device. It allows system designers to use the same circuitry in two separate signaling schemes. Thus, the designers can select to use one output characteristics or the other for their designs.
Other objects and attainments together with a fuller understanding of the invention will become apparent and appreciated by referring to the following description and claims taken in conjunction with the accompanying drawings.


REFERENCES:
patent: 6005414 (1999-12-01), Reay
patent: 6218858 (2001-04-01), Menon et al.
patent: 6377069 (2002-04-01), Veenstra et al.
patent: 61114319 (1986-06-01), None
patent: 639220 (1988-01-01), None
patent: 06311017 (1994-11-01), None

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